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A Programmable Multi-Format Video Decoder
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  • Journal title : Journal of Broadcast Engineering
  • Volume 20, Issue 6,  2015, pp.963-966
  • Publisher : The Korean Institute of Broadcast and Media Engineers
  • DOI : 10.5909/JBE.2015.20.6.963
 Title & Authors
A Programmable Multi-Format Video Decoder
Kim, Jaehyun; Park, Goo-man;
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This paper introduces a programmable multi-format video decoder(MFD) to support HEVC(High Efficiency Video Coding) standard and for other video coding standards. The goal of the proposed MFD is the high-end FHD(Full High Definition) video decoder needed for a DTV(Digital Tele-Vision) SoC(System on Chip). The proposed platform consists of a hybrid architecture that is comprised of reconfigurable processors and flexible hardware accelerators to support the massive computational load and various kinds of video coding standards. The experimental results show that the proposed architecture is operating at a 300MHz clock that is capable of decoding HEVC bit-stream of FHD 30 frames per second.
multi-format video decoder;reconfigurable processor;HEVC;
 Cited by
초고해상도 멀티 디지털 사이니지 영상 동기화 기술의 설계와 구현,박형일;유선규;문영태;김미옥;신용태;

방송공학회논문지, 2016. vol.21. 5, pp.651-661 crossref(new window)
Chih-Da Chien, et al., “A 252kgates/71mW Multi-Standard Multi-Channel Video Decoder for High Definition Video Application,” ISSCC Dig. Tech. Papers, pp. 282-283, Feb. 2007.

Y. Kikuchi et al. “A 40nm 222mW H.264 Full-HD Decoding, 25 Power Domains, 14-Core Application Processor With x512b Stacked DRAM.” IEEE Trans. Journal of Solid-State Circuits, vol. 46. no. 1, pp. 32-41, Jan. 2011. crossref(new window)

D. Suh, K. Kwon, S. Kim, S. Ryu, and J. Kim, “Design space exploration and implementation of a high performance and low area Coarse Grained Reconfigurable Processor,” in Proceedings of 11th International Conference on Field- Programmable Technology (ICFPT ’12). IEEE, pp. 67–70, 2012.

S. Lee, J. Song, W. Lee, D. Kim, and J. Kim, "DSP based programmable FHD HEVC decoder," Design, Automation & Test in Europe Conference & Exhibition(DATE), pp. 972-973, 2015.

F. Pescador et al., “A DSP HEVC decoder implementation based on OpenHEVC,” In Proc. IEEE Int. Conference on Consumer Electronics, pp61-62, Jan. 2014.