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A Study on the Full-HD HEVC Encoder IP Design
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 Title & Authors
A Study on the Full-HD HEVC Encoder IP Design
Lee, Sukho; Cho, Seunghyun; Kim, Hyunmi; Lee, Jehyun;
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This paper presents a study on the Full-HD HEVC(High Efficiency Video Coding) encoder IP(Intellectual Property) design. The designed IP is for HEVC main profile 4.1, and performs encoding with a speed of 60 fps of full high definition. Before hardware and software design, overall reference model was developed with C language, and we proposed a parallel processing architecture for low-power consumption. And also we coded firmware and driver programs relating IP. The platform for verification of developed IP was developed, and we verified function and performance for various pictures under several encoding conditions by implementing designed IP to FPGA board. Compared to HM-13.0, about 35% decrease in bit-rate under same PSNR was achieved, and about 25% decrease in power consumption under low-power mode was performed.
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HEVC 비디오 인코더 PMR 블록 설계에 대한 연구,이석호;이제현;

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