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A Low Jitter Dual Output Frequency Synthesizer Using Phase-Locked Loop for Smart Audio Devices
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 Title & Authors
A Low Jitter Dual Output Frequency Synthesizer Using Phase-Locked Loop for Smart Audio Devices
Baek, Ye-Seul; Lee, Jeong-Yun; Ryu, Hyuk; Lee, Jongyeon; Baek, Donghyun;
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 Abstract
A Low jitter dual output frequency synthesizer for smart audio devices is described in this paper. It has been fabricated in a 1.8 V Dongbu CMOS process. Output frequency is controlled by 3 rd order Sigma-Delta Modulation and digital divider. The frequency synthesizer has a size of , frequency range of 0.6-200 MHz, loop bandwidth of 350 kHz, and rms jitter of 11.4 ps-21.6 ps.
 Keywords
audio device;frequency synthesizer;phase-locked loop (PLL);low jitter;
 Language
Korean
 Cited by
 References
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