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The Impedance Analysis of Multiple TSV-to-TSV
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 Title & Authors
The Impedance Analysis of Multiple TSV-to-TSV
Lee, Sihyun;
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 Abstract
In this paper, we analyze the impedance analysis of vertical interconnection through-silicon vias (TSV) that is being studied for the purpose of improving the degree of integration and an electric feature in 3D IC. Also, it is to improve the performance and the degree of integration of the three-dimensional integrated circuit system which can exceed the limits of conventional two-dimensional a IC. In the future, TSV technology in full-chip 3-dimensional integrated circuit system design is very important, and a study on the electrical characteristics of the TSV for high-density and high-bandwidth system design is very important. Therefore, we study analyze the impedance influence of the TSV in accordance with the distance and frequency in a multiple TSV-to-TSV for the purpose of designing a full-chip three-dimensional IC. The results of this study also are applicable to semiconductor process tools and designed for the manufacture of a full-chip 3D IC.
 Keywords
3 Dimensional Integrated Circuit (3D IC);Through Silicon Via (TSV);Impedance;
 Language
English
 Cited by
 References
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