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Design of Next Generation Amplifiers Using Nanowire FETs
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 Title & Authors
Design of Next Generation Amplifiers Using Nanowire FETs
Hamedi-Hagh, Sotoudeh; Oh, Soo-Seok; Bindal, Ahmet; Park, Dae-Hee;
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 Abstract
Vertical nanowire SGFETs(Surrounding Gate Field Effect Transistors) provide full gate control over the channel to eliminate short channel effects. This paper presents design and characterization of a differential pair amplifier using NMOS and PMOS SGFETs with a 10nm channel length and a 2nm channel radius. The amplifier dissipates power and provides 5THz bandwidth with a voltage gain of 16, a linear output voltage swing of 0.5V, and a distortion better than 3% from a 1.8V power supply and a 20aF capacitive load. The 2nd and 3rd order harmonic distortions of the amplifier are -40dBm and -52dBm, respectively, and the 3rd order intermodulation is -24dBm for a two-tone input signal with 10mV amplitude and 10GHz frequency spacing. All these parameters indicate that vertical nanowire surrounding gate transistors are promising candidates for the next generation high speed analog and VLSI technologies.
 Keywords
Nanowire;Amplifier;Low Voltage;High Frequency;
 Language
English
 Cited by
 References
1.
B. Heydari, M. Bohsali, E. Adabi and A.M. Niknejad, 'Millimeter-Wave Devices and Circuit Blocks up to 104GHz in 90nm CMOS,' IEEE Journal of Solid State Circuits, Vol. 42, pp. 2893-2903, 2007 crossref(new window)

2.
A. Bindal, A. Naresh, P. Yuan, K.K. Nguyen and S. Hamedi-Hagh, 'The Design of Dual Work Unction CMOS Transistors and Circuits Using Silicon Nan-Wire Technology,' IEEE Journal of Nanotechnology, Vol. 6, pp. 291-302, 2007 crossref(new window)