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Compact Design of the Advanced Encryption Standard Algorithm for IEEE 802.15.4 Devices
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 Title & Authors
Compact Design of the Advanced Encryption Standard Algorithm for IEEE 802.15.4 Devices
Song, Oh-Young; Kim, Ji-Ho;
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 Abstract
For low-power sensor networks, a compact design of advanced encryption standard (AES) algorithm is needed. A very small AES core for ZigBee devices that accelerates computation in AES algorithms is proposed in this paper. The proposed AES core requires only one S-Box, which plays a major role in the optimization. It consumes less power than other block-wide and folded architectures because it uses fewer logic gates. The results show that the proposed design significantly decreases power dissipation; however, the resulting increased clock cycles for 128-bit block data processing are reasonable for IEEE 802.15.4 standard throughputs.
 Keywords
Advanced Encryption Standard (AES);Secure sensor networks;Zigbee security;
 Language
English
 Cited by
1.
An optimized delay-aware common subexpression elimination algorithm for hardware implementation of binary-field linear transform, IEICE Electronics Express, 2014, 11, 22, 20140934  crossref(new windwow)
2.
Optimization of Area and Delay for Implementation of the Composite Field Advanced Encryption Standard S-Box, Journal of Circuits, Systems and Computers, 2016, 25, 05, 1650037  crossref(new windwow)
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