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Design of UHF CMOS Front-ends for Near-field Communications
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 Title & Authors
Design of UHF CMOS Front-ends for Near-field Communications
Hamedi-Hagh, Sotoudeh; Tabesh, Maryam; Oh, Soo-Seok; Park, Noh-Joon; Park, Dae-Hee;
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 Abstract
This paper introduces an efficient voltage multiplier circuit for improved voltage gain and power efficiency of radio frequency identification (RFID) tags. The multiplier is fully integratable and takes advantage of both passive and active circuits to reduce the required input power while yielding the desired DC voltage. A six-stage voltage multiplier and an ultralow power voltage regulator are designed in a 0.13 complementary metal-oxide semiconductor process for 2.45 GHz RFID applications. The minimum required input power for a 1.2 V supply voltage in the case of a 50 antenna is -20.45 dBm. The efficiency is 15.95% for a 1 load. The regulator consumes 129 nW DC power and maintains the reference voltage in a 1.1% range with varying from 0.8 to 2 V. The power supply noise rejection of the regulator is 42 dB near a 2.45 GHz frequency and performs better than -32 dB from 100 Hz to 10 GHz frequencies.
 Keywords
Low-power voltage multipliers;Passive UHF RFID transponders;RF-DC conversion;
 Language
English
 Cited by
 References
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