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A New Topology of Multilevel Voltage Source Inverter to Minimize the Number of Circuit Devices and Maximize the Number of Output Voltage Levels
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 Title & Authors
A New Topology of Multilevel Voltage Source Inverter to Minimize the Number of Circuit Devices and Maximize the Number of Output Voltage Levels
Ajami, Ali; Mokhberdoran, Ataollah; Oskuee, Mohammad Reza Jannati;
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 Abstract
Nowadays multilevel inverters are developing generally due to reduced voltage stress on power switches and low total harmonic distortion (THD) in output voltage. However, for increasing the output voltage levels the number of circuit devices are increased and it results in increasing the cost of converter. In this paper, a novel multilevel inverter is proposed. The suggested topology uses less number of power switches and related gate drive circuits to generate the same level in output voltage with comparison to traditional cascaded multilevel inverter. With the proposed topology all levels in output voltage can be realized. As an illustration, a symmetric 13-level and asymmetric 29-level proposed inverters have been simulated and implemented. The total peak inverse (PIV) and power losses of presented inverter are calculated and compared with conventional cascaded multilevel inverter. The presented analyses show that the power losses in the suggested multilevel inverter are less than the traditional inverters. Presented simulation and experimental results demonstrate the feasibility and applicability of the proposed inverter to obtain the maximum number of levels with less number of switches.
 Keywords
Multilevel inverter;Cascaded multilevel inverter;Reduced number of switches;Low total harmonic distortion;PIV;
 Language
English
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 References
1.
Pablo Lezana, Roberto Aceiton, "Hybrid Multi-cell Converter: Topology and Modulation", IEEE Transactions on Industrial Electronics, vol. 58, no. 9, Sep. 2011.

2.
Ebrahim Babaei, "A Cascade Multilevel Converter Topology With Reduced Number of Switches," IEEE Transactions on Power Electronics, vol. 23, no. 6, Nov. 2008.

3.
M.R. Banaei, E. Salary, "New multilevel inverter with reduction of switches and gate driver," Energy Conversion and Management, vol. 52, pp. 1129-1136, 2011. crossref(new window)

4.
M. Calais, V.G. Agelidis, M. Meinhardt, "Multilevel converters for single phase grid connected photovoltaic systems: an overview," Elsevier J. Solar Energy, vol. 66, no. 6, pp. 325-335, 1999. crossref(new window)

5.
Q. Song and W. Liu, "Control of a cascade STATCOM with star configuration under unbalanced conditions," IEEE Trans. Power Electron., vol. 24, no. 1, pp.45-58, Jan. 2009. crossref(new window)

6.
B. Geethalakshmi and P. Dananjayan, "Investigation of performance of UPFC without DC link capacitor," Elect. Power Energy Res., vol. 48, no. 4, pp. 736-746, 2008.

7.
Hui Ding, Yi Zhang, Aniruddha M. Gole, Dennis A. Min Xiao Han and Xiang Ning Xiao, "Analysis of Coupling Effects on Overhead VSC-HVDC Transmission Lines From AC Lines With Shared Right of Way," IEEE Transactions on Power Delivery, vol. 25, no. 4, Oct. 2010.

8.
Shuhui Li Timothy A. Haskew and Ling Xu, "Control of HVDC Light System Using Conventional and Direct Current Vector Control Approaches," IEEE Transactions on Power Electronics, vol. 25, no. 12, Dec. 2010.

9.
Changliang Xia, Xin Gu, Tingna Shi, and Yan Yan, "Neutral-Point Potential Balancing of Three-Level Inverters in Direct-Driven Wind Energy Conversion System," IEEE Transactions on Energy Conversion, vol. 26, no. 1, Mar. 2011.

10.
J. Rodriguez, L. G. Franquelo, S. Kouro, J. I. Leon, R. C. Portillo, M. A. M. Prats, M. A. Perez, "Multilevel inverters: an enabling technology for high-power applications," Proceedings of IEEE, vol. 97, no. 11, pp. 1786-1817, Nov. 2009. crossref(new window)

11.
F.Z. Peng, J.-S. Lai, J.W. McKeever, and J. Van Coevering, "A multilevel voltage-source inverter with separate DC sources for static var generation," IEEE Trans. Ind. Appl., vol. 32, no. 5, pp. 1130-1138, Sep./Oct. 1996. crossref(new window)

12.
Sergio Busquets-Monge, Salvador Alepuz, Joan Rocabert and Josep Bordonau, "Pulse width Modulations for the Comprehensive Capacitor Voltage Balance of n-Level Three-Leg Diode-Clamped Converters," IEEE Transactions on Power Electronics, vol. 24, no. 5, May 2009.

13.
Maryam Saeedifard, Reza Iravani, and Josep Pou, "A Space Vector Modulation Strategy for a Back-to-Back Five-Level HVDC Converter System," IEEE Transactions on Industrial Electronics, vol. 56, no. 2, Feb. 2009.

14.
Alian Chen and Xiangning He, "Research on Hybrid-Clamped Multilevel-Inverter Topologies," IEEE Transactions on Industrial Electronics, vol. 53, no. 6, Dec. 2006.

15.
Keith A. Corzine, Mike W. Wielebski, Fang Z. Peng and Jin Wang, "Control of Cascaded Multilevel Inverters," IEEE Transactions on Power Electronics, vol. 19, no. 3, May 2004.

16.
Sung Geun Song, Feel Soon Kang and Sung-Jun Park, "Cascaded Multilevel Inverter Employing Three-Phase Transformers and Single DC Input," IEEE Transactions on Industrial Electronics, vol. 56, no. 6, Jun. 2009.

17.
Ebrahim Babaei, Mohammad Sadegh Moeinian, "Asymmetric cascaded multilevel inverter with charge balance control of a low resolution symmetric subsystem," Energy Conversion and Management, vol. 51, pp. 2272-2278, 2010. crossref(new window)

18.
Veenstra M, Rufer A. "Control of a hybrid asymmetric multilevel inverter for competitive medium-voltage industrial drives," IEEE Transactions on Industrial Applications, vol. 41, no. 2, pp. 655-664, 2005. crossref(new window)

19.
Lezana P, Rodriguez J. "Mixed multi-cell cascaded multilevel inverter," ISIE 2007 IEEE international symposium, June, 2007.

20.
Ebrahim Babaei, Seyed Hossein Hosseini, New cascaded multilevel inverter topology with minimum number of switches, Energy Conversion and Management, vol. 50, pp. 2761-2767, 2009. crossref(new window)

21.
Kangarlu, M.F., Babaei, E, "A generalized cascaded multilevel inverter using series connection of submultilevel inverters ," IEEE Trans. Power Electronics, vol. 28, no. 2, pp. 625-636, Feb 2013. crossref(new window)

22.
Data sheet of IGBT 'BUP 400D', Available at: www.datasheetcatalog.com .