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A New Symmetric Cascaded Multilevel Inverter Topology Using Single and Double Source Unit
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  • Journal title : Journal of Power Electronics
  • Volume 15, Issue 4,  2015, pp.951-963
  • Publisher : The Korean Institute of Power Electronics
  • DOI : 10.6113/JPE.2015.15.4.951
 Title & Authors
A New Symmetric Cascaded Multilevel Inverter Topology Using Single and Double Source Unit
Mohd. Ali, Jagabar Sathik; Kannan, Ramani;
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 Abstract
In this paper, a new symmetric multilevel inverter is proposed. A simple structure for the cascaded multilevel inverter topology is also proposed, which produces a high number of levels with the application of few power electronic devices. The symmetric multilevel inverter can generate 2n+1 levels with a reduced number of power switches. The basic unit is composed of a single and double source unit (SDS-unit). The application of this SDS-unit is for reducing the number of power electronic components like insulated gate bipolar transistors, freewheeling diodes, gate driver circuits, dc voltage sources, and blocked voltages by switches. Various new algorithms are recommended to determine the magnitude of dc sources in a cascaded structure. Furthermore, the proposed topology is optimized for different goals. The proposed cascaded structure is compared with other similar topologies. For verifying the performance of the proposed basic symmetric and cascaded structure, results from a computer-based MATLAB/Simulink simulation and from experimental hardware are also discussed.
 Keywords
Multilevel Inverter;Optimal Structure;Power Conversion;Power Semiconductor Switches;Total Harmonic Distortion (THD);
 Language
English
 Cited by
1.
A Novel Six-Level Inverter Topology for Medium-Voltage Applications, IEEE Transactions on Industrial Electronics, 2016, 63, 11, 7195  crossref(new windwow)
 References
1.
J. Rodriguez, J.-S. Lai, and F. Z. Peng, “Multilevel inverters: A survey of topologies, controls, and applications,” IEEE Trans. Ind. Electron, Vol. 49, No. 4, pp.724-738, Aug. 2002.t. crossref(new window)

2.
L. M. Tolbert, F. Z. Peng, and T. G. Habetler, “Multilevel converters for large electric drives,” IEEE Trans. Ind. Appl., Vol. 35, No. 1, pp. 36-44, Jan./Feb. 1999. crossref(new window)

3.
L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, and M. A. M. Prats, “The age of multilevel converters arrives,” IEEE Ind. Electron. Mag., Vol. 2, No. 2, pp. 28-39, Jun. 2008. crossref(new window)

4.
N. S. Choi, J. G. Cho, and G. H. Cho, “A general circuit topology of multilevel inverter,” Power Electronics Specialists Conference, 1991. PESC '91 Record., 22nd Annual IEEE, pp. 96-103, Jun.1991.

5.
K. A. Tehrani, I. Rasoanarivo, and F.-M. Sargos, “Power loss calculation in two different multilevel inverter models (2DM2),” Electric Power Systems Research, Vol. 81, No. 2, pp. 297-307, Feb. 2011. crossref(new window)

6.
C. O. Gerçk and M. Ermis, “Elimination of coupling transformer core saturation in cascaded multilevel converter-based T-STATCOM systems,” IEEE Trans. Power Electron., Vol. 29, No. 12, pp. 6796-6809, Dec. 2014.

7.
S. Bhattacharya, D. Mascarella, and G. Joó, “Modular multilevel inverter: A study for automotive applications,” Electrical and Computer Engineering (CCECE), 2013 26th Annual IEEE Canadian Conference on, pp. 1-6, 2013.

8.
R. Stala, “A natural DC-link voltage balancing of diode-clamped inverters in parallel systems,” IEEE Trans. Ind. Electron., Vol. 60, No. 11, pp. 5008-5018, Nov. 2013. crossref(new window)

9.
J.-S. Lai and F. Z. Peng, “Multilevel converters-a new breed of power converters,” IEEE Trans. Ind. Appl., Vol. 32, No. 3, pp. 509-517, May/Jun. 1996. crossref(new window)

10.
B. P. McGrath, D. G. Holmes, and W. Y. Kong, “A decentralized controller architecture for a cascaded h-bridge multilevel converter,” IEEE Trans. Ind. Electron., Vol. 61, No. 3, pp. 1169-1178, Mar. 2014. crossref(new window)

11.
B. K. Bose, “Power electronics and motor drives recent progress and perspective,” IEEE Trans. Ind. Electron., Vol. 56, No. 2, pp. 581-588, Feb. 2009. crossref(new window)

12.
O. L. Jimenez, R. A. Vargas, J. Aguayo, J. E. Arau, G. Vela, and A. Claudio, “THD in cascade multilevel inverter symmetric and asymmetric,” Electronics, Robotics and Automotive Mechanics Conference (CERMA), pp. 289-295, 2011.

13.
M. Malinowski, K. Gopakumar, J. Rodriguez, and M. A. Péez, “A survey on cascaded multilevel inverters,” IEEE Trans. Ind. Electron, Vol. 57, No. 7, pp. 2197-2206, Jul. 2010. crossref(new window)

14.
J. Ebrahimi, E. Babaei, and G. B. Gharehpetian, “A new topology of cascaded multilevel converters with reduced number of components for high-voltage applications,” IEEE Trans. Power Electron., Vol. 26, No. 11, pp. 3109-3118, Nov. 2011. crossref(new window)

15.
R. S. Alishah, D. Nazarpour, S. H. Hosseini, and M. Sabahi, “Reduction of power electronic elements in multilevel converters using a new cascade structure,” IEEE Trans. Ind. Electron., Vol. 62, No.1, pp. 256-269, Jan. 2015. crossref(new window)

16.
E. Babaei, A. Dehqan, and M. Sabahi, “A new topology for multilevel inverter considering its optimal structures,” Electric Power Systems Research, Vol. 103, pp. 145-156, Oct. 2013. crossref(new window)

17.
J. Ebrahimi, E. Babaei, and G. B. Gharehpetian, “a new multilevel converter topology with reduced number of power electronic components,” IEEE Trans. Ind. Electron., Vol. 59, No. 2, pp. 655-667, Feb. 2012. crossref(new window)

18.
R. Shalchi Alishah, D. Nazarpour, S. H. Hosseini, and M. Sabahi, “Novel topologies for symmetric, asymmetric, and cascade switched-diode multilevel converter with minimum number of power electronic components,” IEEE Trans. Ind. Electron., Vol. 61, No. 10, pp. 5300-5310, Oct. 2014. crossref(new window)

19.
K. Ramani, M. A. J. Sathik, and S. Sivakumar, “A new symmetric multilevel inverter topology using single and double source sub-multilevel inverters,” Journal of Power Electronics, Vol. 15, No. 1, pp. 96-105, Jan. 2015. crossref(new window)

20.
P. Karuppusamy and A. M. Natarajan, “An adaptive neuro-fuzzy model to multilevel inverter for grid connected photovoltaic system,” Journal of Circuits, Systems and Computers, Vol. 24, No. 5, Jun. 2015. crossref(new window)

21.
M. H. Taghvaee, M. A. M. Radzi, S. M. Moosavain, H. Hizam, and M. H. Marhaban, “A current and future study on non-isolated DC–DC converters for photovoltaic applications,” Renewable and Sustainable Energy Reviews, Vol. 17, pp. 216-227, Jan. 2013. crossref(new window)

22.
H. Rezk and A. M. Eltamaly, “A comprehensive comparison of different MPPT techniques for photovoltaic systems,” Solar Energy, Vol. 112, pp. 1-11, Feb. 2015. crossref(new window)

23.
B. P. McGrath and D. G. Holmes, “Multicarrier PWM strategies for multilevel inverters,” IEEE Trans. Ind. Electron, Vol. 49, No. 4, pp. 858-867, Aug. 2002. crossref(new window)

24.
A. M. Y. M. Ghias, J. Pou, V. G. Agelidis, and M. Ciobotaru, “Voltage balancing method for a flying capacitor multilevel converter using phase disposition PWM,” IEEE Trans. Ind. Electron., Vol. 61, No. 12, pp. 6538-6546, Dec. 2014. crossref(new window)

25.
M. A. S. Aneesh, A. Gopinath, and M. R. Baiju, “A simple space vector PWM generation scheme for any general -level inverter,” IEEE Trans. Ind. Electron., Vol. 56, No. 5, pp. 1649-1656, May 2009. crossref(new window)

26.
C. Buccella, C. Cecati, M. G. Cimoroni, and K. Razi, “Analytical method for pattern generation in five-level cascaded H-bridge inverter using selective harmonic elimination,” IEEE Trans. Ind. Electron, Vol. 61, No.11, pp. 5811-5819, Nov. 2014. crossref(new window)

27.
J. Zaragoza, J. Pou, S. Ceballos, E. Robles, P. Ibaez, and J. L. Villate, “A comprehensive study of a hybrid modulation technique for the neutral-point-clamped converter,” IEEE Trans. Ind. Electron,Vol. 56, No. 2, pp. 294-304, Feb. 2009. crossref(new window)

28.
A. Shukla, A. Ghosh, and A. Joshi, “Hysteresis modulation of multilevel inverters,” IEEE Trans. Power Electron., Vol. 26, No. 5, pp. 1396-1409, May 2011. crossref(new window)

29.
P. Hu, and D. Jiang, “A level-increased nearest level modulation method for modular multilevel converters,” IEEE Trans. Power Electron., Vol. 30, No. 4, pp. 1836–1842, Apr. 2015. crossref(new window)

30.
Z. Du, L. M. Tolbert, B. Ozpineci, and J. N. Chiasson, “Fundamental frequency switching strategies of a seven-level hybrid cascaded H-bridge multilevel inverter,” IEEE Trans. Power Electron., Vol. 24, No. 1, pp. 25-33, Jan. 2009. crossref(new window)

31.
S. Kouro, R. Bernal, H. Miranda, C. A. Silva, and J. Rodriguez, “High-performance torque and flux control for multilevel inverter fed induction motors,” IEEE Trans. Power Electron., Vol. 22, No. 6, pp. 2116-2123, Nov. 2007. crossref(new window)

32.
Y. Zhang, S. Sobhani, and R. Chokhawala, Snubber Considerations for IGBT Applications, Application Note International Rectifier, pp. 1-9, 1995.