A New DPWM Method to Suppress the Low Frequency Oscillation of the Neutral-Point Voltage for NPC Three-Level Inverters

- Journal title : Journal of Power Electronics
- Volume 15, Issue 5, 2015, pp.1207-1216
- Publisher : The Korean Institute of Power Electronics
- DOI : 10.6113/JPE.2015.15.5.1207

Title & Authors

A New DPWM Method to Suppress the Low Frequency Oscillation of the Neutral-Point Voltage for NPC Three-Level Inverters

Lyu, Jianguo; Hu, Wenbin; Wu, Fuyun; Yao, Kai; Wu, Junji;

Lyu, Jianguo; Hu, Wenbin; Wu, Fuyun; Yao, Kai; Wu, Junji;

Abstract

In order to suppress the low frequency oscillation of the neutral-point voltage for three-level inverters, this paper proposes a new discontinuous pulse width modulation (DPWM) control method. The conventional sinusoidal pulse width modulation (SPWM) control has no effect on balancing the neutral-point voltage. Based on the basic control principle of DPWM, the relationship between the reference space voltage vector and the neutral-point current is analyzed. The proposed method suppresses the low frequency oscillation of the neutral-point voltage by keeping the switches of a certain phase no switching in one carrier cycle. So the operating time of the positive and negative small vectors is equal. Comparing with the conventional SPWM control method, the proposed DPWM control method suppresses the low frequency oscillation of the neutral-point voltage, decreases the output waveform harmonics, and increases both the output waveform quality and the system efficiency. An experiment has been realized by a neutral-point clamped (NPC) three-level inverter prototype based on STM32F407-CPLD. The experimental results verify the correctness of the theoretical analysis and the effectiveness of the proposed DPWM method.

Keywords

Discontinuous pulse width modulation (DPWM);Low frequency oscillation;Neutral-point voltage balancing;Three-level inverter;

Language

English

Cited by

References

1.

A. Nabae, I. Takahashi, and H. Akagi. “A new neutral-point-clamped PWM Inverter,” IEEE Trans. Ind. Appl., Vol. 1A-17, No. 5, pp. 518-522. Sep./Oct. 1981.

2.

C. C. Wang, Y. D. Li, “Analysis and calculation of Zero-Sequence Voltage Considering Neutral-Point Potential Balancing in Three-Level NPC converters,” IEEE Trans. Ind. Electron., Vol. 57, No.7, pp. 2262-2271, Jul. 2010.

3.

J. S. Lee and K. B. Lee, “New Modulation Techniques for a Leakage Current Reduction and a Neutral-Point Voltage Balance in Transformerless Photovoltaic Systems Using a Three-Level Inverter,” IEEE Trans. Power Electron., Vol. 29, No. 4, pp. 1720-1732, Apr. 2014.

4.

J. Pou, J. Zaragoza, S. Ceballos, V. M. Sala, R. P. Burgos, D. Boroyevich, “Fast-Processing modulation strategy for the neutral-point-clamped converter with total elimination of low-frequency voltage oscillations in the neutral point,” IEEE Trans. Ind. Electron., Vol. 54, No.4, pp. 2288-2294, Aug. 2007.

5.

U. M. Choi, J. S. Lee, and K. B. Lee, “New modulation strategy to balance the neutral-point voltage for three-level neutral-clamped inverter systems,” IEEE Trans. Energy Convers., Vol. 29, No. 1, pp. 91-100, Mar. 2014.

6.

U. M. Choi and K. B. Lee, “Space vector modulation strategy for neutral-point voltage balancing in three-level inverter systems,” IET Power Electron., Vol. 6, No. 7, pp. 1390-1398, Apr.2013.

7.

J. Pou, J. Zaragoza, S. Ceballos, M. Saeedifard, and D. Boroyevich, “A carrier-based PWM strategy with zero-sequence voltage injection for a three-level neutral-point-clamped converter,” IEEE Trans. Power Electron., Vol. 27, No. 2, pp. 642-651, Feb. 2012.

8.

Y. Jiao, F. C. Lee, and S. Z Lu, “Space vector modulation for three-level NPC converter with neutral point voltage balance and switching loss reduction,” IEEE Trans. Power Electron., Vol. 29, No. 10, pp. 5579-5591, Oct. 2014.

9.

N. Celanovic and D. Boroyevich, “A comprehensive study of neutral-point voltage balancing problem in three-level neutral-point-clamped voltage source PWM inverters,” IEEE Trans. Power Electron., Vol. 15, No. 2, pp. 242-249, Mar. 2000.

10.

H. B. Zhang, S. J. Finney, A. Massoud, and B. W. Williams, “An SVM algorithm to balance the capacitor voltages of the three-level NPC active power filter,” IEEE Trans. Power Electron., Vol.23, No. 6, pp. 2694-2702, Nov. 2008.

11.

J. Pou, R. Pindado, D. Boroyevich, and P. Rodriguez, “Evaluation of the low-frequency neutral-point voltage oscillations in the three-level inverter,” IEEE Trans. Ind. Electron., Vol. 52, No. 6, pp. 1582-1588. Dec. 2005.

12.

U. M. Choi, H. H. Lee, and K. B. Lee, “Simple neutral point voltage control for three-level inverters using a discontinuous pulse width modulation,” IEEE Trans. Energy Convers., Vol. 28, No. 2, pp. 434-443, May 2013.

13.

J. Shen, S. Schroder, B. Duro, and R. Roesner, “A neutral-point balancing controller for a three-level inverter with full power-factor range and low distortion,” IEEE Trans. Ind. Electron., Vol. 49, No.1, pp. 138-148, Jan./Feb. 2013.

14.

N. V. Nguyen, B. X. Nguyen, and H. H. Lee, “An optimized discontinuous PWM method to minimize switching loss for multilevel inverters,” IEEE Trans. Ind. Electron., Vol. 58, No. 9, pp. 3958-3966, Sep. 2011.