Publisher : The Korean Institute of Power Electronics
DOI : 10.6113/JPE.2015.15.6.1664
Title & Authors
A Series Arc Fault Detection Strategy for Single-Phase Boost PFC Rectifiers Cho, Younghoon; Lim, Jongung; Seo, Hyunuk; Bang, Sun-Bae; Choe, Gyu-Ha;
This paper proposes a series arc fault detection algorithm which incorporates peak voltage and harmonic current detectors for single-phase boost power factor correction (PFC) rectifiers. The series arc fault model is also proposed to analyze the phenomenon of the arc fault and detection algorithm. For arc detection, the virtual dq transformation is utilized to detect the peak input voltage. In addition, multiple combinations of low- and high-pass filters are applied to extract the specific harmonic components which show the characteristics of the series arc fault conditions. The proposed model and the arc detection method are experimentally verified through a boost PFC rectifier prototype operating under the grid-tied condition with an artificial arc generator manufactured under the guidelines for the Underwriters Laboratories (UL) 1699 standard.
A Novel Arc Fault Detector for Early Detection of Electrical Fires, Sensors, 2016, 16, 4, 500
L. Kumpulainen, G. A. Hussain, M. Lehtonen, and J. A. Kay, “Preemptive arc fault detection techniques in switchgear and controlgear,” IEEE Trans. Ind. Appl., Vol. 49, No. 4, pp. 1911-1919, Jul./Aug. 2013.
G. D. Gregory and G. W. Scott, “The arc-fault circuit interrupter: an emerging product,” IEEE Trans. Ind. Appl., Vol. 34, No. 5, pp. 928-933, Sep./Oct. 1998.
K. J. Lippert and T. A. Domitrovich, “AFCIs - from a standars perspective,” IEEE Trans. Ind. Appl., Vol. 50, No. 2, pp. 1478-1482, Mar./Apr. 2014.
L. Zhu, S. Ji, and Y. Liu, “Generation and developing process of low voltage series dc arc,” IEEE Trans. Plasma Sci., Vol. 42, No. 10, pp. 2718-2719, Oct. 2014.
G. Parise and L. Parise, “Unprotected faults of electrical and extension cords in ac and dc systems,” IEEE Trans. Ind. Appl., Vol. 50, No. 1, pp. 4-9, Jan./Feb. 2014
G. D. Gregory, K. Wong, and R. F. Dvorak, “More about arc-fault circuit interrupters,” IEEE Trans. Ind. Appl., Vol. 40, No. 4, pp. 1006-1011, Jul./Aug. 2004.
S. Barmada, M. Raugi, M. Tucci, and F. Romano, “Arc detection in pantograph-catenary systems by the use of support vector machines-based classification,” IET Electr. Syst. Transp., Vol. 4, No. 2, pp. 45-52, 2014.
P. Sivakumar and M. S. Arutchelvi, “Enhanced controller topology for photovoltaic sourced grid connected inverters under unbalanced nonlinear loading,” Journal of Power Electronics, Vol. 14, No. 2, pp. 369-382, 2014.
H.-H. Shin, H. Cha, H. Kim, and H.-G. Kim, “Extended boost single-phase qZ-source inverter for photovoltaic systems,” Journal of Power Electronics, Vol. 14, No. 5, pp. 918-925, 2014.
K. Koziy, B. Gou, and J. Aslakson, “A low-cost power-quality meter with series arc-fault detection capability for smart grid,” IEEE Trans. Power Del., Vol. 28, No. 3, pp. 1584-1591, Jul. 2013.
F. B. Costa, “Boundary wavelet coefficients for real-time detection of transients induced by faults and power-suqality disturbances,” IEEE Trans. Power. Del., Vol. 29, No. 6, pp. 2674-2687, Dec. 2014.
L. H. X. Yao, S. Ji, K. Zou, J. Wang, “Characteristics study and time-domain discrete-wavelet-transform based hybrid detection of series dc arc faults,” IEEE Trans. Power Electron., Vol. 29, No. 6, pp. 3103-3115, Jun. 2014.
S. Gautam and S. M. Brahma, “Detection of high impedance fault in power distribution systems using mathematical morphology,” IEEE Trans. Power Syst. , Vol. 28, No. 2, pp. 1226-1234, May 2013.
H. Livani and C. Y. Evrenosoglu, “A machine learning and wavelet-based fault location method for hybrid transmission lines,” IEEE Trans. Smart Grid, Vol. 5, No. 1, pp. 51-59, Jan. 2014.
A. Ahmethodzic, M. Kapetanovic, K. Sokolija, R. P. P. Smeets, and V. Kertesz, “Linking a physical arc model with a black box arc model and verification,” IEEE Trans. Dielectr. Electr. Insul., Vol. 18, No. 4, pp. 1029-1037, Aug. 2011.
M. M. Walter and C. M. Franck, “Optimal test current shape for accurate arc characteristics determination,” IEEE Trans. Power Del., Vol. 29, No. 4, pp. 1798-1805, Aug. 2014.
G. Parise, L. Martirano, and M. Laurini, “Simplified arc-fault model: the reduction factor of the arc current,” IEEE Trans. Ind. Appl., Vol. 49, No. 4, pp. 1703-1710, Jul./Aug. 2013.
N. Zamanan and J. K. Sykulski, “Modelling arcing high impedances faults in relation to the physical processes in the electric arc,” WSEAS Transactions on Power Systems., Vol. 1, No. 8, pp. 1507-1512, 2006.
U. L. Inc., "Standard for safety: arc-fault circuit-interrupters," ed, 2008.
H.-S. Kim and J.-W. Choi, “PLL for unbalanced three-phase utility voltage using positive sequence voltage observer,” Transactions of Korean Institute of Power Electronics (KIPE), Vol. No. 2, pp. 145-151, Apr. 2008.