Advanced SearchSearch Tips
Carrier Based Common Mode Voltage Reduction Techniques in Neutral Point Clamped Inverter Based AC-DC-AC Drive System
facebook(new window)  Pirnt(new window) E-mail(new window) Excel Download
  • Journal title : Journal of Power Electronics
  • Volume 16, Issue 1,  2016, pp.142-152
  • Publisher : The Korean Institute of Power Electronics
  • DOI : 10.6113/JPE.2016.16.1.142
 Title & Authors
Carrier Based Common Mode Voltage Reduction Techniques in Neutral Point Clamped Inverter Based AC-DC-AC Drive System
Ojha, Amit; Chaturvedi, Pradyumn; Mittal, Arvind; Jain, Shailendra;
  PDF(new window)
Common mode voltage (CMV) generation is a major problem in switching power converter fed induction motor drive systems. CMV is the zero sequence voltage generated due to the switching action of power converters. Even a small magnitude of CMV with a high rate of change may circulate large bearing currents which may damage a machine's bearings and shorten its life. There are several methods of controlling CMV. This paper presents 3-level sinusoidal pulse width modulation based techniques to control the magnitude and rate of change of CMV in multilevel AC-DC-AC drive systems. Simulation and experimental investigations have been presented to validate the performance of proposed technique to control CMV in 3-level neutral point clamped inverter based AC-DC-AC system.
AC-DC-AC Drives;Common Mode Voltage Control;Neutral Point Clamped Inverter;Switching Converters;
 Cited by
S. Chen and T. A. Lipo, “Source of induction motor bearing currents caused by PWM inverters,” IEEE Trans. Energy Convers., Vol. 11, No. 1, pp. 25-32, Mar. 1996. crossref(new window)

F. Wang, “Motor shaft voltages and bearing currents and their reduction in multilevel medium-voltage PWM voltage-source-inverter drive applications,” IEEE Trans. Ind. Appl., Vol. 36, No.5, pp. 1336-1341,Sep./Oct. 2000. crossref(new window)

C. Klumpner, J.A. Aziz, and J. Clare, "A new buck-type active front end rectifier topology with improved voltage transfer ratio and common mode voltage cancellation," in Industry Applications Conference, 2005. Fourtieth IAS Annual Meeting. Conference Record of the 2005, Vol.1,pp.631-638, Oct. 2005.

J.A. Aziz, C. Klumpner, and J. Clare, "A hybrid approach to improve the robustness against unbalanced voltage supply and cancel the common mode voltage for a 3-ph buck-type rectifier," in Power Electronics and Motion Control Conference, 2006. EPE-PEMC 2006. 12th International, pp.653-658, Aug./Sep.2006.

S. Sedghi, A. Dastfan, and A. Ahmadyfard, "A new multilevel carrier based pulse width modulation method for modular multilevel inverter," in IEEE 8th International Conference on Power Electronics and ECCE Asia (ICPE & ECCE), 2011, pp.1432-1439, May/Jun. 2011.

A. Videt, P. Moigne, N. Idir, and P. Baudesson, “A new carrier based PWM Providing common mode current reduction and DC bus balancing for three-level inverters,” IEEE Trans. Ind. Electron., Vol. 54, No. 6, pp. 3001-3011,Dec. 2007. crossref(new window)

J. Rodriguez, J. Pontt, P. Correa, P. Cortes, and S. Cesar, “A new modulation method to reduce common-mode voltages in multilevel inverters,” IEEE Trans. Ind. Electron., Vol. 51, No. 4, pp. 834-839, Aug. 2004. crossref(new window)

O. Dordevic, M. Jones, and E. Levi, “A comparison of carrier-based and space vector PWM techniques for three-level five-phase voltage source inverters,” IEEE Trans. Ind. Informat., Vol.9, No.2, pp.609-619, May 2013. crossref(new window)

A. K. Gupta and A. M. Khambadkone, “A space vector modulation scheme to reduce common mode voltage for cascaded multilevel inverters,” IEEE Trans. Power Electron., Vol. 22, No.5, pp. 1672-1681, Sep. 2007. crossref(new window)

P. N. Tekwani, R. S. Kanchan, and K. Gopakumar, “A dual five-level inverter-fed induction motor drive with common-mode voltage elimination and dc-link capacitor voltage balancing using only the switching-state redundancy—Part II,” IEEE Trans. Ind. Electron., Vol.54, No.5, pp.2600-2608, Oct. 2007. crossref(new window)

C-.C. Hou, C-.C. Shih, P-.T. Cheng, and A. M. Hava,“Common-mode voltage reduction pulse width modulation techniques for three-phase grid-connected converters,” IEEE Trans. Power Electron., Vol.28, No.4, pp.1971-1979, Apr. 2013. crossref(new window)

R. S. Kanchan, P. N. Tekwani, and K. Gopakumar, “Three level scheme with common mode voltage elimination and dc link capacitor voltage balancing for an open-end winding induction motor drive,” IEEE Trans. Power Electron., Vol. 21, No. 6, pp. 1676-1683, Nov. 2006. crossref(new window)

P. C. Loh, D. G. Holmes, Y. Fukuta, and T. A. Lipo, "A reduced common mode hysteresis current regulation strategy for multilevel inverter," in IEEE Applied Power Electronics Conf. and Expo., 2003, APEC, Vol.1, pp.576-582, Feb. 2003.

S. Wei, N. Zargari, W. Bin, and S. Rizzo, "Comparison and mitigation of common mode voltage in power converter topologies," in Conf. Rec. IAS Annual Meeting, Vol. 3, pp. 1852-1857, Oct. 2004.

P.K. Chaturvedi, S. Jain, and P. Agarwal, “Carrier-based common mode voltage control techniques in three-level diode-clamped inverter,” Advances in Power Electronics, Vol. 2012, p.12, Jul. 2012. crossref(new window)

M. R. Mohan and H. M. Survwanshi, “Multilevel inverter to reduce common mode voltage in AC Motor drives using SPWM technique,” Journal of Power Electronics, Vol. 11, No.1, pp. 21-27, Jan.2011. crossref(new window)

A. Esmaeli and F. Tavassoli, “Suppressing of common-mode voltage, shaft voltage, leakage current and EMI generated by voltage source PWM inverter,” International Electrical Engineering Journal, Vol. 1, No. 1,pp. 529-535, 2011.