Digitally Current Controlled DC-DC Switching Converters Using an Adjacent Cycle Sampling Strategy

- Journal title : Journal of Power Electronics
- Volume 16, Issue 1, 2016, pp.227-237
- Publisher : The Korean Institute of Power Electronics
- DOI : 10.6113/JPE.2016.16.1.227

Title & Authors

Digitally Current Controlled DC-DC Switching Converters Using an Adjacent Cycle Sampling Strategy

Wei, Tingcun; Wang, Yulin; Li, Feng; Chen, Nan; Wang, Jia;

Wei, Tingcun; Wang, Yulin; Li, Feng; Chen, Nan; Wang, Jia;

Abstract

A novel digital current control strategy for digitally controlled DC-DC switching converters, referred to as Adjacent Cycle Sampling (ACS), is proposed in this paper. For the ACS current control strategy, the available time interval from sampling the current to updating the duty ratio, is approximately one switching cycle. In addition, it is independent of the duty ratio. As a result, the contradiction between the processing speed of the hardware and the transient response speed can be effectively relaxed by using the ACS current control strategy. For digitally controlled buck DC-DC switching converters with trailing-edge modulation, digital current control algorithms with the ACS control strategy are derived for three different control objectives. These objectives are the valley, average, and peak inductor currents. In addition, the sub-harmonic oscillations of the above current control algorithms are analyzed and eliminated by using the digital slope compensation (DSC) method. Experimental results based on a FPGA are given, which verify the theoretical analysis results very well. It can be concluded that the ACS control has a faster transient response speed than the time delay control, and that its requirements for hardware processing speed can be reduced when compared with the deadbeat control. Therefore, it promises to be one of the key technologies for high-frequency DC-DC switching converters.

Keywords

Adjacent Cycle Sampling (ACS);Digitally controlled DC-DC switching converter;Digital current control algorithm;Digital Slope Compensation (DSC);Sub-harmonic oscillation;Transient response speed;

Language

English

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