An Improved Phase-Shifted Carrier Pulse Width Modulation Based on the Artificial Bee Colony Algorithm for Cascaded H-Bridge Multilevel Inverters

- Journal title : Journal of Power Electronics
- Volume 16, Issue 2, 2016, pp.512-521
- Publisher : The Korean Institute of Power Electronics
- DOI : 10.6113/JPE.2016.16.2.512

Title & Authors

An Improved Phase-Shifted Carrier Pulse Width Modulation Based on the Artificial Bee Colony Algorithm for Cascaded H-Bridge Multilevel Inverters

Cai, Xinjian; Wu, Zhenxing; Li, Quanfeng; Wang, Shuxiu;

Cai, Xinjian; Wu, Zhenxing; Li, Quanfeng; Wang, Shuxiu;

Abstract

Cascaded H-bridge multilevel (CHBML) inverters usually include a large number of isolated dc-voltage sources. Some faults in the dc-voltage sources result in unequal cell dc voltages. Unfortunately, the conventional phase-shifted carrier (PSC) PWM method that is widely used for CHBML inverters cannot eliminate low frequency sideband harmonics when the cell dc voltages are not equal. This paper analyzes the principle of sideband harmonic elimination, and proposes an improved PSCPWM that can eliminate low frequency sideband harmonics under the condition of unequal dc voltages. In order to calculate the carrier phases, it is necessary to solve transcendental equations for low frequency sideband harmonic elimination. Therefore, an approach based on the artificial bee colony (ABC) algorithm is presented in this paper. The proposed PSCPWM method enhances the reliability of CHBML inverters. The proposed PSCPWM is not limited to CHBML inverters. It can also be applied to other types of multilevel inverters. Simulation and experimental result obtained from a prototype CHBML inverter verify the theoretical analysis and the achievements made in this paper.

Keywords

Artificial bee colony algorithm;Cascaded H-bridge multilevel (CHBML) inverter;Phase-shifted carrier pulse width modulation (PSCPWM);Unequal dc voltages;

Language

English

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