Switching Transient Analysis and Design of a Low Inductive Laminated Bus Bar for a T-type Converter

- Journal title : Journal of Power Electronics
- Volume 16, Issue 4, 2016, pp.1256-1267
- Publisher : The Korean Institute of Power Electronics
- DOI : 10.6113/JPE.2016.16.4.1256

Title & Authors

Switching Transient Analysis and Design of a Low Inductive Laminated Bus Bar for a T-type Converter

Wang, Quandong; Chang, Tianqing; Li, Fangzheng; Su, Kuifeng; Zhang, Lei;

Wang, Quandong; Chang, Tianqing; Li, Fangzheng; Su, Kuifeng; Zhang, Lei;

Abstract

Distributed stray inductance exerts a significant influence on the turn-off voltages of power switching devices. Therefore, the design of low stray inductance bus bars has become an important part of the design of high-power converters. In this study, we first analyze the operational principle and switching transient of a T-type converter. Then, we obtain the commutation circuit, categorize the stray inductance of the circuit, and study the influence of the different types of stray inductance on the turn-off voltages of switching devices. According to the current distribution of the commutation circuit, as well as the conditions for realizing laminated bus bars, we laminate the bus bar of the converter by integrating the practical structure of a capacitor bank and a power module. As a result, the stray inductance of the bus bar is reduced, and the stray inductance in the commutation circuit of the converter is reduced to more than half. Finally, a 10 kVA experimental prototype of a T-type converter is built to verify the effectiveness of the designed laminated bus bar in restraining the turn-off voltage spike of the switching devices in the converter.

Keywords

Laminated bus bar;Reverse blocking IGBT;Switching transient;T-type converter;Turn-off voltage;

Language

English

References

1.

Z. Lounis, I. Rasoanariv, and B. Davat, “Minimization of wiring inductance in high power IGBT inverter,” IEEE Trans. Power Del., Vol. 15, No. 2, pp. 551-555, Apr. 2000.

2.

S. Li, L. M. Tolbert, F. Wang, and F. Z. Peng, "Reduction of stray inductance in power electronic modules using basic switching cells," in IEEE Energy Conversion Congress & Exposition(ECCE), pp. 2686-2691, Sep. 2010.

3.

H. J. Beukes, J. H. R. Enslin, and R. Spee, "Bus bar design consideration for high power IGBT converters," in 28^{th} Annual IEEE Power Electronics Specialists Conference (PESC), Vol. 2, pp. 847-853, Jun. 1997.

4.

R. Yi and Z. M. Zhao, “Research on the turn-off characteristic of igct influenced by the stray inductance in high power inverters,” Proceedings of the Csee, Vol. 27, No. 31, pp. 115-130, Dec. 2007.

5.

J. Wang, B. J. Yang, Z. X. Xu, Y. Deng, R. X. Zhao, and X. N. He, “Configuration of low inductive laminated bus bar in 750kVA NPC three-level universal converter module of high power density,” Proceedings of the Csee., Vol. 30, No. 18, pp. 47-54, May 2010.

6.

H. Ohashi, “Snubber circuit for high power gate turn-off thyristors,” IEEE Trans. Ind. Appl., Vol. IA-19, No. 4, pp. 655-664, Jul. 1983.

7.

J. H. Suh, B. S. Suh, and D. S. Hyun, “A new snubber circuit for high efficiency and overvoltage limitation in there level GTO inverters,” IEEE Trans. Ind. Electron., Vol. 44, No. 2, pp. 145-156, Apr. 1997.

8.

P. Meng, X. Wu, J. Yang, H. Chen, and Z Qian, "Analysis and design considerations for EMI and losses of RCD snubber in flyback converter," in 25^{th} Annual IEEE Applied Power Electronics Conference and Exposition (APEC), pp. 642-647, Feb. 2010.

9.

S. Shirmohammadi and Y. S. Suh, "Low dissipative snubber using flyback type transformer for 10 kV IGCT in 7 MW wind turbine systems," in 17^{th} European Conference on Power Electronics and Applications (EPE'15 ECCE-Europe), pp. 1-10, Sep. 2015.

10.

M. C. Caponet, F. Profumo, R. W. De Doncker, and A. Tenconi, “Low stray inductance bus bar design and construction for good EMC performance in power electronic circuits,” IEEE Trans. Power Electron., Vol. 17, No. 2, pp. 225-231, Mar. 2002.

11.

G. Skibinski and D. M. Divan, "Design methodology & modeling of low inductance planar bus structures," in 5^{th} European Conference on Power Electronics and Applications, Vol. 3, pp. 98-105, Sep. 1993.

12.

A. Masato and W. Keiji, “Laminated bus bar design for power converter circuit considering structural and electrical limitations,” IEEE Trans. Ind. Appl., Vol. 134, No. 4, pp. 447-453, Jan. 2014.

13.

Z. N. Ariga and K. Wada, "Laminated bus bar structure for low induced noise," in 7^{th} International Conference on Integrated Power Electronics Systems (CIPS), pp. 1-6, Mar. 2012.

14.

L. Ma, T. Kerekes, R. Teodorescu, X. M. Jin, D. Floricau, and M. Liserre, "The high efficiency transformer-less PV inverter topologies derived from NPC topology," in 13^{th} European Conference on Power Electronics and Applications (EPE'09), pp. 1-10, Sep. 2009.

15.

M. Schweizer and J. W. Kolar, “Design and implementation of a highly efficient three-level T-type converter for low-voltage applications,” IEEE Trans. Power Electron., Vol. 28, No. 2, pp. 899-907, Feb. 2013.

16.

C. Verdugo, S. Kouro, C. Rojas, and T. Meynard, "Comparison of single-phase T-type multilevel converters for grid-connected PV systems," in IEEE Energy Conversion Congress and Exposition(ECCE), pp. 3319-3325, Sep. 2015.

17.

J. S. Lee and K. B. Lee, “Open-switch fault tolerance control for a three-level NPC/T-type rectifier in wind turbine systems,” IEEE Trans. Ind. Electron., Vol. 62, No. 2, pp. 1012-1021, Feb. 2015.

18.

M. Takei, T. Naito, and K. Ueno, "The reverse blocking IGBT for matrix converter with ultra-thin wafer technology," in Proceedings of ISPSD'03, pp. 156-159, 2003.

19.

E. R. Motto, J. F. Donlon, M. Tabata, H. Takahashi, Y. Yu, and G. Majumdar, "Application characteristics of an experimental RB-IGBT (reverse blocking IGBT) module," in IEEE Industry Applications Conference, Vol. 3, pp. 1540-1544, Oct. 2004.

20.

K. Shimoyama, M. Takei, Y. Souma, A. Yajima, S. Kajiwara, and H. Nakazawa, "A new isolation technique for reverse blocking IGBT with ion implantation and laser annealing to tapered chip edge sidewalls," in IEEE International Symposium on Power Semiconductor Devices & IC's, pp. 156-159, 2006.