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Design of a Reliable Broadband I/O Employing T-coil
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 Title & Authors
Design of a Reliable Broadband I/O Employing T-coil
Kim, Seok; Kim, Shin-Ae; Jung, Goeun; Kwon, Kee-Won; Chun, Jung-Hoon;
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 Abstract
Inductive peaking using T-coils has been widely used in broadband I/O interfaces. In this paper, we analyze technical effects and limitations of the T-coil, and discuss several methods that can overcome these restrictions and improve the practicality of the T-coil. In particular we also propose and verify a circuit topology which can further extend bandwidth beyond the limit that conventional T-coil can achieve, and transfer 20 Gb/s data without noticeable distortion.
 Keywords
Inductive peaking;T-coil;ESD;high-speed interface;reliability;
 Language
English
 Cited by
1.
PMOS 트랜지스터의 ESD 손상 분석,이경수;정고은;권기원;전정훈;

대한전자공학회논문지SD, 2010. vol.47. 2, pp.40-50
2.
고주파 집적회로를 위한 ESD 보호회로 설계,김석;권기원;전정훈;

대한전자공학회논문지SD, 2010. vol.47. 8, pp.36-46
1.
ESD Design Strategies for High-Speed Digital and RF Circuits in Deeply Scaled Silicon Technologies, IEEE Transactions on Circuits and Systems I: Regular Papers, 2010, 57, 9, 2301  crossref(new windwow)
2.
A 5.2-Gb/s Low-Swing Voltage-Mode Transmitter With an AC-/DC-Coupled Equalizer and a Voltage Offset Generator, IEEE Transactions on Circuits and Systems I: Regular Papers, 2014, 61, 1, 213  crossref(new windwow)
 References
1.
A. Amerasekera and C. Duvvury, "ESD in Silicon Integrated Circuits", 2nd edition: Wiley, 2002

2.
B. Kleveland, T. J. Maloney, I. Morgan, L. Madden, T. H. Lee, and S. S. Wong, "Distributed ESD protection for high-speed integrated circuits," IEEE Electron Device Lett., vol.21, pp.390-392, Aug., 2000 crossref(new window)

3.
C. Ito, K. Banerjee and R. Dutton, "Analysis and design of distributed ESD protection circuits for high-speed mixed-signal and RF ICs," IEEE Trans. Electron Devices, vol.49, No.8, pp.1444-1454, Aug., 2002 crossref(new window)

4.
T. True, "Bridged-T Termination Network" U.S. Patent 3 155 927, 1964

5.
S. Galal and B. Razavi, "Broadband ES protection circuits in CMOS technology," IEEE J. Solid-State Circuits, vol.38, no.12, pp.2334-2340, Dec., 2003 crossref(new window)

6.
T. H. Lee, "The Design of CMOS Radio-Frequency Integrated Circuits", 2nd edition: Cambridge, 2004

7.
S. Galal and B. Razavi, "40-Gb/s amplifier and ESD protection circuit in 0.18-um CMOS technology," IEEE J. Solid-State Circuits, vol.39, no.12, pp.2389- 2396, Dec., 2004 crossref(new window)

8.
J. Paramesh and D. J. Allstot, "Analysis of the bridged T-coil circuit using the extra-element theorem," IEEE Trans. Circuits Syst. II, Exp. Briefs, vol.53, no.12, pp.1408-1412, Dec., 2006 crossref(new window)

9.
D. Linten and G. Groeseneken, "T-Diodes - A Novel Plug-and-PLAT Wideband RF Circuit ESD Protection Methodology," EOS/ESD symposium 2007, 242-249

10.
J. Chun, "ESD protection circuits for advanced CMOS technologies," Ph.D Dissertation, Stanford University, 2006