Investigations on the Optimal Support Vector Machine Classifiers for Predicting Design Feasibility in Analog Circuit Optimization

Title & Authors
Investigations on the Optimal Support Vector Machine Classifiers for Predicting Design Feasibility in Analog Circuit Optimization
Lee, Jiho; Kim, Jaeha;

Abstract
In simulation-based circuit optimization, many simulation runs may be wasted while evaluating infeasible designs, i.e. the designs that do not meet the constraints. To avoid such a waste, this paper investigates the use of support vector machine (SVM) classifiers in predicting the design`s feasibility prior to simulation and the optimal selection of the SVM parameters, namely, the Gaussian kernel shape parameter $\small{{\gamma}}$ and the misclassification penalty parameter C. These parameters affect the complexity as well as the accuracy of the model that SVM represents. For instance, the higher $\small{{\gamma}}$ is good for detailed modeling and the higher C is good for rejecting noise in the training set. However, our empirical study shows that a low $\small{{\gamma}}$ value is preferable due to the high spatial correlation among the circuit design candidates while C has negligible impacts due to the smooth and clean constraint boundaries of most circuit designs. The experimental results with an LC-tank oscillator example show that an optimal selection of these parameters can improve the prediction accuracy from 80 to 98% and model complexity by $\small{10{\times}}$.
Keywords
Support vector machine classifier;analog design optimization;feasibility prediction;SVM parameter;
Language
English
Cited by
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