Advanced SearchSearch Tips
Comparative Analysis on Positive Bias Stress-Induced Instability under High VGS/Low VDS and Low VGS/High VDS in Amorphous InGaZnO Thin-Film Transistors
facebook(new window)  Pirnt(new window) E-mail(new window) Excel Download
 Title & Authors
Comparative Analysis on Positive Bias Stress-Induced Instability under High VGS/Low VDS and Low VGS/High VDS in Amorphous InGaZnO Thin-Film Transistors
Kang, Hara; Jang, Jun Tae; Kim, Jonghwa; Choi, Sung-Jin; Kim, Dong Myong; Kim, Dae Hwan;
  PDF(new window)
Positive bias stress-induced instability in amorphous indium-gallium-zinc-oxide (a-IGZO) bottom-gate thin-film transistors (TFTs) was investigated under high /low and low /high stress conditions through incorporating a forward/reverse sweep and a low/high read-out conditions. Our results showed that the electron trapping into the gate insulator dominantly occurs when high /low stress is applied. On the other hand, when low /high stress is applied, it was found that holes are uniformly trapped into the etch stopper and electrons are locally trapped into the gate insulator simultaneously. During a recovery after the high /low stress, the trapped electrons were detrapped from the gate insulator. In the case of recovery after the low /high stress, it was observed that the electrons in the gate insulator diffuse to a direction toward the source electrode and the holes were detrapped to out of the etch stopper. Also, we found that the potential profile in the a-IGZO bottom-gate TFT becomes complicatedly modulated during the positive stress and the recovery causing various threshold voltages and subthreshold swings under various read-out conditions, and this modulation needs to be fully considered in the design of oxide TFT-based active matrix organic light emitting diode display backplane.
a-IGZO TFT;driving condition of AMOLED;positive bias stress;charge trapping;electron-hole pair generation;
 Cited by
K. Nomura, et al., "Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors," Nature, Vol.432, p. 488, Nov., 2004. crossref(new window)

E. M. C. Fortunato, et al., "High mobility indium free amorphous oxide thin film transistors" Appl. Phys. Lett., Vol.92, No.22, p. 590, Jun., 2008.

J.-S. Park, "Oxide TFTs for AMOLED TVs," Information Display, Vol.29, No.2, p. 16, 2013.

J. F. Wager, "Flat-Panel-Display Backplanes: LPTS or IGZO for AMLCDs or AMOLED Displays?," Information Display, Vol.30, No.2, p. 26, 2014.

W.-J. Nam, et al. "55-inch OLED TV using InGaZnO TFTs with WRGB pixel Dising," SID Symposium Digest., Vol.44, No.1, p. 243, Jun. 2013.

S. M. Lee, et al., "Device instability under high gate and drain biases in InGaZnO thin film transistors," IEEE Trans. Device Mater, Reliab., Vol.14, No.1, p. 471, Mar., 2014. crossref(new window)

C.-Y. Jeong, et al., "A study on the degradation mechanism of InGaZnO thin-film transistors under simultaneous gate and drain bias stresses based on the electronic trap characterization," Semicond. Sci. and Technol., Vol.29, No.4, p. 045023, Mar., 2014. crossref(new window)

S. Urakawa, et al., "Thermal analysis of amorphous oxide thin-film transistor degraded by combination of joule heating and hot carrier effect," Appl. Phys. Lett., Vol.102, No.5, p. 053506, Feb., 2013. crossref(new window)

T.-Y. Hsieh, et al., "Investigating the Drain-Bias-Induced Degradation Behavior Under Ligh Illumination for InGaZnO Thin-Film Transistors," IEEE Electron Device Lett., Vol.33, No.7, p. 1000-1002, Jul., 2012. crossref(new window)

J.-M. Lee, et al., "Bias-stress-induced stretchedexponential time dependence of threshold voltage shift in InGaZnO thin film transistors," Appl. Phys. Lett., Vol.93, No.9, p. 093504, Sep., 2008. crossref(new window)

C. P. T. Nguyen, et al., "Bias-stress-induced threshold voltage shift dependence of negative charge trapping in the amorphous indium tin zinc oxide thin-film transistors," Semicond. Sci. Technol. Vol.28, No.10, p. 105014, Aug., 2013. crossref(new window)

S. H. Choi and M. K. Han, "Effect of channel widths on negative shift of threshold voltage, including stress-induced hump phenomenon in InGaZnO thin-film transistors under high-gate and drain bias stress," Appl. Phys. Lett., Vol.100, No.4, p. 043503, Jan., 2012. crossref(new window)

Atlas User's Manual, Silvaco, Santa Clara, CA, 2014.

Y. Kim, et al., "Amorphous InGaZnO Thin-Film Transistor-Part 1: Complete Extraction of Density of States Over the Full subband-Gap Energy Range," IEEE Trans. Electron Devices, Vol.56, No.10, p. 2689, Oct. 2012.

E. K.-H. Yu, et at., "Density of states of amorphous In-Ga-Zn-O from electrical and optical characterization," Appl. Phys. Lett., Vol.116, No.15, p. 154505, Oct. 2014.