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Sub-10 nm Ge/GaAs Heterojunction-Based Tunneling Field-Effect Transistor with Vertical Tunneling Operation for Ultra-Low-Power Applications
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 Title & Authors
Sub-10 nm Ge/GaAs Heterojunction-Based Tunneling Field-Effect Transistor with Vertical Tunneling Operation for Ultra-Low-Power Applications
Yoon, Young Jun; Seo, Jae Hwa; Cho, Seongjae; Kwon, Hyuck-In; Lee, Jung-Hee; Kang, In Man;
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In this paper, we propose a sub-10 nm Ge/GaAs heterojunction-based tunneling field-effect transistor (TFET) with vertical band-to-band tunneling (BBT) operation for ultra-low-power (LP) applications. We design a stack structure that is based on the Ge/GaAs heterojunction to realize the vertical BBT operation. The use of vertical BBT operations in devices results in excellent subthreshold characteristics with a reduction in the drain-induced barrier thinning (DIBT) phenomenon. The proposed device with a channel length () of 5 nm exhibits outstanding LP performance with a subthreshold swing (S) of 29.1 mV/dec and an off-state current () of . In addition, the use of the highk spacer dielectric improves the on-state current () with an intrinsic delay time () because of a higher fringing field. We demonstrate a sub-10 nm LP switching device that realizes a good S and lower at a lower supply voltage () of 0.2 V.
Tunneling field-effect transistor (TFET);low-power (LP) performance;short-channel effect (SCE);Ge/GaAs heterojunction;vertical tunneling operation;
 Cited by
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