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A 10-Gb/s Multiphase Clock and Data Recovery Circuit with a Rotational Bang-Bang Phase Detector
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 Title & Authors
A 10-Gb/s Multiphase Clock and Data Recovery Circuit with a Rotational Bang-Bang Phase Detector
Kwon, Dae-Hyun; Rhim, Jinsoo; Choi, Woo-Young;
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 Abstract
A multiphase clock and data recovery (CDR) circuit having a novel rotational bang-bang phase detector (RBBPD) is demonstrated. The proposed 1/4-rate RBBPD decides the locking point using a single clock phase among sequentially rotating 4 clock phases. With this, our RBBPD has significantly reduced power consumption and chip area. A prototype 10-Gb/s 1/4-rate CDR with RBBPD is successfully realized in 65-nm CMOS technology. The CDR consumes 5.5 mW from 1-V supply and the clock signal recovered from PRBS input data has 0.011-UI rms jitter.
 Keywords
Bang-bang phase detector;clock and data recovery;multiphase;
 Language
English
 Cited by
 References
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