JOURNAL BROWSE
Search
Advanced SearchSearch Tips
Output Noise Reduction Technique Based on Frequency Hopping in a DC-DC Converter for BLE Applications
facebook(new window)  Pirnt(new window) E-mail(new window) Excel Download
 Title & Authors
Output Noise Reduction Technique Based on Frequency Hopping in a DC-DC Converter for BLE Applications
Park, Ju-Hyun; Kim, Sung Jin; Lee, Joo Young; Park, Sang Hyeon; Lee, Ju Ri; Kim, Sang Yun; Kim, Hong Jin; Lee, Kang-Yoon;
  PDF(new window)
 Abstract
In this paper, a different type of pulse width modulation (PWM) control scheme for a buck converter is introduced. The proposed buck converter uses PWM with frequency hopping and a low quiescent.current low dropout (LDO) voltage regulator with a power supply rejection ratio enhancer to reduce high spurs, harmonics and output voltage ripples. The low quiescent.current LDO voltage regulator is not described in this paper. A three-bit binary-to-thermometer decoder scheme and voltage ripple controller (VRC) is implemented to achieve low voltage ripple less than 3mV to increase the efficiency of the buck converter. An internal clock that is synchronized to the internal switching frequency is used to set the hopping rate. A center frequency of 2.5MHz was chosen because of the bluetooth low energy (BLE) application. This proposed DC-DC buck converter is available for low-current noise-sensitive loads such as BLE and radio frequency loads in portable communications devices. Thus, a high-efficiency and low-voltage ripple is required. This results in a less than 2% drop in the regulator`s efficiency, and a less than 3mV voltage ripple, with -26 dBm peak spur reduction operating in the buck converter.
 Keywords
Buck converter;Frequency hopping;Thermometer decoder;Pulse width modulation;Spurious noise;
 Language
English
 Cited by
 References
1.
J. Balcells et al., "EMI Reduction in Switched Power Converters Using Frequency Modulation Techniques," IEEE Trans. Electromagn. Compat., vol.47, no. 3, Aug., 2005.

2.
W. Yan et al., "A noise-shaped Buck DC-DC converter With Improved Light-Load Efficiency and Fast Transient Response" IEEE Trans. Power Electron., vol. 26, no. 12, Dec., 2011.

3.
C. Tao et al., "PWM Control Architecture With Constant Cycle Frequency Hopping and Phase Chopping for Spur-Free Operation in Buck Regulators" IEEE Trans. VLSI System, vol. 21, no. 9, Sep., 2013.

4.
Y. Tokunaga et al., "An On-Chip CMOS Relaxation Oscillator With Voltage Averaging Feedback" IEEE J. Solid-State Circuits, vol. 45, no. 6, June 2010.

5.
C. Tao et al., "A Low-Noise PFM-Controlled Buck Converter for Low-Power Applications" IEEE Trans. Circuit Syst. I, Reg. Papers, vol. 59, no. 12, Dec. 2012.

6.
P. J. Jiu et al., "Spur-Reduction Design of Frequency-Hopping DC-DC Converters" IEEE Trans. Power Electron., vol. 27, no.11 Nov. 2012.

7.
Kun-Chun Chang et al., "A Fast Hysteretic Buck DCDC converter with Start-up Overshoot Suppression technique" 2012 Asia Pacific Conference on Postgraduate research in Microelectronics and Electronics (PrimeAsia), pp. 56-60, Dec. 2012.

8.
Y. P. Su et al., "A Pseudo-Noise Coded Constant-offtime( PNT-COT) Control Switching Converter with Maximum 18.7dBm Peak Spur Reduction and 92% Efficiency in 40nm CMOS" 2013 Symposium on VLSI Circuits Digest of Technical Papers, pp. c170-c171, Jun. 2013.

9.
E. J. Kim et al., "Spurious Noise Reduction by Modulating Switching Frequency in DC-to-DC Converter for RF Power Amplifier" IEEE RFIC Symposium, pp.43-46, May. 2010.