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Low-Power Fully Digital Voltage Sensor using 32-nm FinFETs
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 Title & Authors
Low-Power Fully Digital Voltage Sensor using 32-nm FinFETs
Nguyen, H.V.; Kim, Youngmin;
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In this paper, a design for a fully digital voltage sensor using a 32-nm fin-type field-effect transistor (FinFET) is presented. A new characteristic of the double gate p-type FinFET (p-FinFET) is examined and proven appropriate for sensing voltage variations. On the basis of this characteristic, a novel technique for designing low-power voltage-to-time converters is presented. Then, we develop a digital voltage sensor with a voltage range of 0.7 to 1.1V at a 50-mV resolution. The performance of the proposed sensor is evaluated under a range of voltages and process variations using Simulation Program with Integrated Circuit Emphasis (SPICE) simulations, and the sensor is proven capable of operating under ultra-low power consumption, high linearity, and fairly high-frequency conditions (i.e., 100 MHz).
FinFET;Voltage sensor;Voltage-to-time converter;ADC;Voltage variation;Low power;
 Cited by
B. Swahn, H. Soha, "Gate sizing: FinFETs vs. 32 nm bulk MOSFETs," Design Automation Conference, 43rd ACM/IEEE, pp. 528-531, 2006.

J. Muttreja, N. Agarwal, N. K. Jha, "CMOS logic design with independent-gate FinFETs,' 25th International Conference on Computer Design, ICCD 2007, pp. 560-567, 7-10 Oct. 2007.

B.H. Calhoun, Yu Cao, Xin Li, Ken Mai, L.T. Pileggi, R.A. Rutenbar, K.L. Shepard, "Digital circuit design challenges and opportunities in the era of nanoscale CMOS," in Proceedings of the IEEE, vol. 96, no. 2, pp. 343-365, Feb. 2008. crossref(new window)

G. W. Roberts, M. Ali-Bakhshian, "A brief introduction to time-to-digital and digital-to-time converters," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 57, no. 3, pp. 153-157, Mar. 2010.

S. W. Chen, M. H. Chang, W. C. Hsieh, W. Hwang, "Fully on-chip temperature, process, and voltage sensors," in Proceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 897-900, May 2010.

T. Watanabe, T. Mizuno, Y. Makino, "An all-digital analog-to-digital converter with $12-{\mu}V/LSB$ using moving-average filtering," IEEE Journal of Solid-State Circuits, vol. 38, no. 1, pp. 120-125, Jan. 2003. crossref(new window)

S. Taillefer, G. W. Roberts, "Delta Sigma A/D conversion via time-mode signal processing," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 56, no. 9, pp. 1908-1920, Sep. 2009.

V. P. Trivedi, J. G. Fossum, W. Zhang, "Threshold voltage and bulk inversion effects in nonclassical CMOS devices with undoped ultra thin devices," Solid State Electronics, pp. 170-178, Jan. 2007.

S. A. Tawfik, V. Kursun, "Characterization of new static independent-gate-biased FinFET latches and flip-flops under process variations," in Proceedings of 9th International Symposium on Quality Electronic Design, ISQED 2008, pp. 311-316, Mar. 2008.

Y. J. Cho, S. H. Lee, "An 11b 70-MHz 1.2-mm2 49- mW $0.18{\mu}m$ CMOS ADC with on-chip current/ voltage references," IEEE Transactions on Circuits and Systems I: Regular Papers, pp. 1989-1995, Oct. 2005.

H. Farkhani et al., "A fully digital ADC using a new delay element with enhanced linearity," IEEE International Symposium on Circuits and Systems, ISCAS 2008, pp. 2406-2409, May 2008.

M. A. Farahat, F. A. Farag, H. A. Elsimary, "Only digital technology analog-to-digital converter circuit," in Proceedings of IEEE 46th Midwest Symposium on Circuits and Systems, 2003, pp. 178-181, Dec. 2003.

Y. Cao, PTM, [Online].

T. Watanabe, Y. Makino, Y. Ohtsuka, S. Akita, T. Hattori, "A CMOS time-to-digital converter LSI with half-nanosecond resolution using a ring gate delay line," IEICE Transaction on Electron, pp. 1774-1779, Dec. 1993.

H. V. Nguyen and Y. Kim, "32nm FinFET-based 0.7-to-1.1 V Digital Voltage Sensor with 50mV Resolution", in IEEE Proceedings of the ICICDT'12, May 2012.

HSPICE, F-2011.09-SP1

M. R. Valero, S. Celma, B. Calvo and N. Medrano, "CMOS Voltage-to-Frequency Converter with Temperature Drift Compensation," in IEEE Transactions on Instrumentation and Measurement, vol. 60, no. 9, pp. 3232-3234, Sept. 2011. crossref(new window)

D. Shang, F. Xia and A. Yakovlev, "Wide-range, reference free, on-chip voltage sensor for variable Vdd operations," Circuits and Systems (ISCAS), 2013 IEEE International Symposium on, Beijing, 2013, pp. 37-40.