Code Rate 1/2, 2304-b LDPC Decoder for IEEE 802.16e WiMAX

Title & Authors
Code Rate 1/2, 2304-b LDPC Decoder for IEEE 802.16e WiMAX
Kim, Hae-Ju; Shin, Kyung-Wook;

Abstract
This paper describes a design of low-density parity-check(LDPC) decoder supporting block length 2,304-bit and code rate 1/2 of IEEE 802.16e mobile WiMAX standard. The designed LDPC decoder employs the min-sum algorithm and partially parallel layered-decoding architecture which processes a sub-matrix of $\small{96{\times}96}$ in parallel. By exploiting the properties of the min-sum algorithm, a new memory reduction technique is proposed, which reduces check node memory by 46% compared to conventional method. Functional verification results show that it has average bit-error-rate(BER) of $\small{4.34{\times}10^{-5}}$ for AWGN channel with Fb/No=2.1dB. Our LDPC decoder synthesized with a $\small{0.18{\mu}m}$ CMOS cell library has 174,181 gates and 52,992 bits memory, and the estimated throughput is about 417 Mbps at 100-MHz@l.8-V.
Keywords
low-density parity-check (LDPC) code;WiMAX;layered decoding;min-sum algorithm;
Language
Korean
Cited by
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