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Low-power Butterfly Structure for DIT Radix-4 FFT Implementation
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 Title & Authors
Low-power Butterfly Structure for DIT Radix-4 FFT Implementation
Jang, Young-Beom; Lee, Sang-Woo;
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 Abstract
There are two FFT(Fast Fourier Transform) algorithms, which are DIT(Decimation-In-Time) and DIF(Decimation-In- Frequency). Even the DIF algorithm is more widely used because of its various implementation architectures, the DIT structures have not been investigated. In this paper, the DIT Radix-4 algorithm is derived and its efficient butterfly structure is proposed for SoC(System on a Chip) implementation.
 Keywords
FFT;DIT;Radix-4;Butterfly;SoC;
 Language
Korean
 Cited by
1.
새로운 DIT Radix-4 FFT 구조 및 구현,장영범;이상우;

한국산학기술학회논문지, 2015. vol.16. 1, pp.683-690 crossref(new window)
2.
새로운 DIT Radix-8 FFT 나비연산기 구조,장영범;

한국산학기술학회논문지, 2015. vol.16. 8, pp.5579-5585 crossref(new window)
 References
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R. Sarmiento, V. D. Armas, J. F. Lopez, J. A. Montiel-Nelson, and A. Nunez, "A CORDIC processor for FFT computation and its implementation using gallium arsenide technology," IEEE Trans. VLSI Syst., vol. 6, no. 1, pp. 18-30, Mar. 1998. crossref(new window)

2.
J. Lee and H. Lee, "A high-Speed two-Parallel Radix-24 FFT/IFFT processor for MB-OFDM UWB Systems," IEICE Trans. Fundam. Electron. Commun. Comput. Sci., vol. E91-A, no. 4, pp. 1206-1211, Apr. 2008. crossref(new window)

3.
H. J. Kim and Y. B. Jang, "Low-area FFT processor structure using radix-42 algorithm," J. Inst. Electron. Eng. Korea (IEEK), vol. 49-SD, no. 3, pp. 8-14, Mar. 2012.

4.
E. J. Kim and M. H. Sunwoo, "High speed 8-parallel FFT/IFFT processor using efficient pipeline architecture and scheduling scheme,"J. Korea Inform. Commun. Soc. (KICS), vol. 36, no. 3, pp. 175-182, Mar. 2011. crossref(new window)

5.
K. Rao, D. N. Kim, and J. J. Hwang, Fast Fourier Transform - Algorithms and Applications, Springer, 2011.