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Hardware-Based High Performance XML Parsing Technique Using an FPGA
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 Title & Authors
Hardware-Based High Performance XML Parsing Technique Using an FPGA
Lee, Kyu-hee; Seo, Byeong-seok;
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 Abstract
A structured XML has been widely used to present services on various Web-services. The XML is also used for digital documents and digital signatures and for the representation of multimedia files in email systems. The XML document should be firstly parsed to access elements in the XML. The parsing is the most compute-instensive task in the use of XML documents. Most of the previous work has focused on hardware based XML parsers in order to improve parsing performance, while a little work has studied parsing techniques. We present the high performance parsing technique which can be used all of XML parsers and design hardware based XML parser using an FPGA. The proposed parsing technique uses element analyzers instead of the state machine and performs multibyte-based element matching. As a result, our parsing technique can reduce the number of clock cycles per byte(CPB) and does not need to require any preprocessing, such as loading XML data into memory. Compared to other parsers, our parser acheives 1.33~1.82 times improvement in the system performance. Therefore, the proposed parsing technique can process XML documents in real time and is suitable for applying to all of XML parsers.
 Keywords
XML hardware parser;multibyte parsing;parsing technique;element analyzer;FPGA;
 Language
Korean
 Cited by
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