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A Study of FC-NIC Design Using zynq SoC for Host Load Reduction
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 Title & Authors
A Study of FC-NIC Design Using zynq SoC for Host Load Reduction
Hwang, Byeung-Chang; Seo, Jung-hoon; Kim, Young-Su; Ha, Sung-woo; Kim, Jae-Young; Jang, Sun-geun;
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 Abstract
This paper shows that design, manufacture and the performance of FC-NIC (fibre channel network interface card) for network unit configuration which is based on one of the 5 main configuration items of the common functional module for IMA (integrated modular Avionics) architecture. Especially, FC-NIC uses zynq SoC (system on chip) for host load reductions. The host merely transmit FC destination address, source memory location and size information to the FC-NIC. After then the FC-NIC read the host memory via DMA (direct memory access). FC upper layer protocol and sequence process at local processor and programmable logic of FC-NIC zynq SoC. It enables to free from host load for external communication. The performance of FC-NIC shows average 5.47 us low end-to-end latency at 2.125 Gbps line speed. It represent that FC-NIC is one of good candidate network for IMA.
 Keywords
Fibre channel;Integrated modular avionics;Network interface card;System on a chip;Direct memory access;
 Language
Korean
 Cited by
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