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Test Vector Generator of timing simulation for 224-bit ECDSA hardware
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 Title & Authors
Test Vector Generator of timing simulation for 224-bit ECDSA hardware
Kim, Tae Hun; Jung, Seok Won;
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Hardware are developed in various architecture. It is necessary to verifying value of variables in modules generated in each clock cycles for timing simulation. In this paper, a test vector generator in software type generates test vectors for timing simulation of 224-bit ECDSA hardware modules in developing stage. It provides test vectors with GUI format and text file format.
Digital Signature;ECDSA;Test Vectors;Timing Simulation;Hardware Architecture;
 Cited by
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