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A Small-area Hardware Design of 128-bit Lightweight Encryption Algorithm LEA
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 Title & Authors
A Small-area Hardware Design of 128-bit Lightweight Encryption Algorithm LEA
Sung, Mi-Ji; Shin, Kyung-Wook;
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 Abstract
This paper describes an efficient hardware design of Lightweight Encryption Algorithm (LEA) developed by National Security Research Institute(NSRI). The LEA crypto-processor supports for master key of 128-bit. To achieve small-area and low-power implementation, an efficient hardware sharing is employed, which shares hardware resources for encryption and decryption in round transformation block and key scheduler. The designed LEA crypto-processor was verified by FPGA implementation. The LEA core synthesized with Xilinx ISE has 1,498 slice elements, and the estimated throughput is 216.24 Mbps with 135.15 MHz.
 Keywords
Lightweight Encryption Algorithm;LEA;IoT Security;Information Security;Secret Key Encryption;
 Language
Korean
 Cited by
1.
128비트 LEA 암호화 블록 하드웨어 구현 연구,윤기하;박성모;

스마트미디어저널, 2015. vol.4. 4, pp.39-46
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