Design of a Time-to-Digital Converter Using Counter

Title & Authors
Design of a Time-to-Digital Converter Using Counter
Choi, Jin-Ho;

Abstract
The synchronous TDC(Time-to-Digital Converter) of counter-type using current-conveyor is designed by $\small{0.18{\mu}m}$ CMOS process and the supply voltage is 3 volts. In order to compensate the disadvantage of a asynchronous TDC the clock is generated when the start signal is applied and the clock is synchronized with the start signal. In the asynchronous TDC the error range of digital output is from $\small{-T_{CK}}$ to $\small{T_{CK}}$. But the error range of digital output is from 0 to $\small{T_{CK}}$ in the synchronous TDC. The error range of output is reduced by the synchronization between the start signal and the clock when the timing-interval signal is converted to digital value. Also the structure of the synchronous TDC is simple because there is no the high frequency external clock. The operation of designed TDC is confirmed by the HSPICE simulation.
Keywords
time-to-digital converter;counter type;flash type;current conveyor circuit;time-interval signal;
Language
Korean
Cited by
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