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Memory window characteristics of vertical nanowire MOSFET with asymmetric source/drain for 1T-DRAM application
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 Title & Authors
Memory window characteristics of vertical nanowire MOSFET with asymmetric source/drain for 1T-DRAM application
Lee, Jae Hoon; Park, Jong Tae;
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 Abstract
In this work, the memory window characteristics of vertical nanowire device with asymmetric source and drain was analyzed using bipolar junction transistor mode for 1T-DRAM application. A gate-all-around (GAA) MOSFET with higher doping concentration in the drain region than in the source region was used. The shape of GAA MOSFET was a tapered vertical structure that the source area is larger than the drain area. From hysteresis curves using bipolar junction mode, the memory windows were 1.08V in the forward mode and 0.16V in the reverse mode, respectively. We observed that the latch-up point was larger in the forward mode than in the reverse mode by 0.34V. To confirm the measurement results, the device simulation has been performed and the simulation results were consistent in the measurement ones. We knew that the device structure with higher doping concentration in the drain region was desirable for the 1T-DRAM using bipolar junction mode.
 Keywords
nanowire MOSFET;vertical MOSFET;Asymmetry source/drain MOSFET;1T-DRAM;
 Language
Korean
 Cited by
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