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Task-to-Tile Binding Technique for NoC-based Manycore Platform with Multiple Memory Tiles
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  • Journal title : Journal of KIISE
  • Volume 43, Issue 2,  2016, pp.163-176
  • Publisher : Korean Institute of Information Scientists and Engineers
  • DOI : 10.5626/JOK.2016.43.2.163
 Title & Authors
Task-to-Tile Binding Technique for NoC-based Manycore Platform with Multiple Memory Tiles
Kang, Jintaek; Kim, Taeyoung; Kim, Sungchan; Ha, Soonhoi;
The contention overhead on the same channel in an NoC architecture can significantly increase a communication delay due to the simultaneous communication requests that occur. To reduce the overall overhead, we propose task-to-tile binding techniques for an NoC-based manycore platform, whereby it is assumed that the task mapping decision has already made. Since the NoC architecture may have multiple memory tiles as its size grows, memory clustering is used to balance the load of memory by making applications access different memory tiles. We assume that the information on the communication overhead of each application is known since it is specified in a dataflow task graph. Using this information, this paper proposes two heurisitics that perform binding of multiple tasks at once based on a proper memory clustering method. Experiments with an NoC simulator prove that the proposed heurisitic shows performance gains that are 25% greater than that of the previous binding heuristic.
NoC architecture;binding-heuristic;NoC-clustering;load-balancing;
 Cited by
E. A. Lee and D. G. Messerschmitt, "Synchronous data flow," Proc. of the IEEE, Vol. 75, No. 9, pp. 1234-1245, 1987.

E. Carvalho, N. Calazans, and F. Moraes, "Heuristics for dynamic task mapping in noc-based heterogeneous mpsocs," Proc. of the Rapid System Prototyping 2007, pp. 34-40, 2007.

A. K. Singh, T. Srikanthan, A. Kumar, and W. Jigang, "Communication-aware heuristics for runtime task mapping on noc-based mpsoc platforms," Journal of Systems Architecture, Vol. 56, No. 7, pp. 242-255, 2010. crossref(new window)

E. Carvalho, N. Ewerson, and F. Moraes, "Congestion-aware task mapping in heterogeneous MPSoCs," Proc. of the System-on-Chip 2008, pp. 1-4, 2008.

A. K. Singh, W. Jigang, A. Prakash, and T. Srikanthan, "Mapping algorithms for noc-based heterogeneous mpsoc platforms," Proc. of the Digital System Design, Architectures, Methods and Tools, 2009, pp. 133-140, 2009.

C. Lee, S. Kim, and S. Ha, "Efficient run-time resource management of a manycore accelerator for stream-based applications," Proc. of the Embedded Systems for Real-time Multimedia 2013, pp. 51-60, 2013.

F. Fazzino, M. Palesi, and D. Patti, "Noxim: Network-on-chip simulator," [Online]. Available:

S. Kim, C. Lee, T. Kim, and S. Ha, "Software platform for hybrid resource management of a many-core accelerator for multimedia applications," Proc of the Embedded Systems for Real-time Multimedia 2014, pp. 12-19, 2014.

Kalray Turbocard. (2015) [Online] Available:

Tilera. (2015). TILE-Gx Processors. [Online] Available: