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FBDtoVHDL: An Automatic Translation from FBD into VHDL for FPGA Development
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  • Journal title : Journal of KIISE
  • Volume 43, Issue 5,  2016, pp.569-578
  • Publisher : Korean Institute of Information Scientists and Engineers
  • DOI : 10.5626/JOK.2016.43.5.569
 Title & Authors
FBDtoVHDL: An Automatic Translation from FBD into VHDL for FPGA Development
Kim, Jaeyeob; Kim, Eui-Sub; Yoo, Junbeom; Lee, Young Jun; Choi, Jong-Gyun;
The PLC (Programmable Logic Controller) has been widely used for the development of digital control system of nuclear power plant. The PLC has high maintenance costs and increasing complexity, hence, FPGA (Field Programmable Gate Array) based digital control system has been considered as an alternative. However, the development of FPGA based digital control system is a challenge for PLC engineers because they are required to learn about new language to develop FPGA and knowledge and know-how acquired in the development of PLC is not transferable. In this study, we proposed and implemented an automatic translation tool for translation of FBD (Function Block Diagram), a programming language of PLC software, into VHDL (VHSIC Hardware Description Language). Automatically translating the FBD to VHDL using this tool allows PLC engineers to develop FPGA without any knowledge of the hardware description language.
PLC;FPGA;FBD;VHDL;automatic translation tool;
 Cited by
International Electronical Commission (IEC), "International standard for programmable controller-Part 3: Programming languages," IEC, 1993.

International Atomic Energy Agency, 2008, "Instrumentation and control (I&C) systems in nuclear power plants: A time of transition," [Online]. Available: (downloaded 2015, Nov. 11)

International Atomic Energy Agency (IAEA), 2002, "Instrumentation and Control Systems Important to Safety in Nuclear Power Plants Safety Guide," [Online]. Available: (downloaded 2015, Nov. 11)

J-G Choi, et al., "Survey of the CPLD/FPGA technology for application to NPP digital I&C system," Korea Atomic Energy Research Institute (KAERI), Tech. Rep., 2009.

Korea Atomic Energy Research Institute (KAERI), "KNICS-RPS-SRS101 Rev.00.," 2003.

Institute of Electrical and Electronics Engineers (IEEE), IEEE Standard VHDL Language Reference Manual, IEEE-1076, 2009.

PLCopen Technical Committee 6, 2009, XML Formats for IEC 61131-3, [Online]. Available: (downloaded 2015, Nov. 11)

H. Back, J. Yoo, S. Cha, "A CASE Tool for Automatic Generation of FBD Program from NuSCR Formal Specification," Journal of KIISE : Computing Practices and Letters, Vol. 15, No. 4, pp. 265-269, Apr. 2009. (in Korean)

J. Kim, E.-S Kim, J. Yoo, Y. J. Lee, J.-G Choi, "An Integrated Software Testing Framework for FPGAbased Controllers in Nuclear Power Plants," Nuclear Engineering and Technology, Vol. 48, No. 2, pp. 470-481, 2016. crossref(new window)

D. Du, Y. Liu, X. Guo, K. Yamazaki and M. Fujishima, "Study on LD-VHDL conversion for FPGA-based PLC implementation," The International Journal of Advanced Manufacturing Technology, Vol. 40, No. 11-12, pp. 1181-1190, 2009. crossref(new window)

D. Du, X. Xu, and K. Yamazaki, "A study on the generation of silicon-based hardware Plc by means of the direct conversion of the ladder diagram to circuit design language," The International Journal of Advanced Manufacturing Technology, Vol. 49, No. 5-8, pp. 615-626, 2010. crossref(new window)

C. Economakos, and G. Economakos, "FPGA implementation of PLC programs using automated highlevel synthesis tools," 2008 IEEE International Symposium on Industrial Electronics, pp. 1908-1913, 2008.

C. Economakos and G. Economakos, "Optimized FPGA implementations of demanding PLC programs based on hardware high-level synthesis," 2008 IEEE International Conference on Emerging Technologies and Factory Automation, pp. 1002-1009, 2008.

E.-S. Kim, J. Yoo, J.-G. Choi, Y. J. Lee, and J.-S. Lee, "A Technique for Demonstrating Safety and Correctness of Program Translators: Strategy and Case Study," 2014 IEEE International Symposium on Software Reliability Engineering Workshops, pp. 210-215, 2014.

J. Yoo, J.-H. Lee, S. Jeong, and S. D. Cha, "FBDtoVerilog: A Vendor-Independent Translation from FBDs into Verilog Programs," The Twenty-Third International Conference on Software Engineering and Knowledge Engineering (SEKE 2011), pp. 48-51, 2011.

R. K. Brayton, et al., "VIS: A system for verification and synthesis," Computer Aided Verification, Springer, pp. 428-432, 1996.