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Development of Gate Structure in Junctionless Double Gate Field Effect Transistors
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  • Journal title : Journal of IKEEE
  • Volume 19, Issue 4,  2015, pp.514-519
  • Publisher : Institude of Korean Electrical and Electronics Engineers
  • DOI : 10.7471/ikeee.2015.19.4.514
 Title & Authors
Development of Gate Structure in Junctionless Double Gate Field Effect Transistors
Cho, Il Hwan; Seo, Dongsun;
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We propose the multiple gate structure of double gate junctionless metal oxide silicon field oxide transistor (JL MOSFET) for device optimization. Since different workfunction within multiple metal gates, electric potential nearby source and drain region is modulated in accordance with metal gate length. On current, off current and threshold voltage are influenced with gate structure and make possible to meet some device specification. Through the device simulation work, performance optimization of double gate JL MOSFETs are introduced and investigated.
device optimization;multiple gate;junctionless field effect transistor;threshold voltage;subthreshold swing;
 Cited by
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