Publisher : Institude of Korean Electrical and Electronics Engineers
DOI : 10.7471/ikeee.2015.19.4.583
Title & Authors
Design of HEVC CABAC Encoder With Parallel Processing of Bypass Bins Kim, Doohwan; Moon, Jeonhak; Lee, Seongsoo;
In the HEVC CABAC, the probability model is updated after a bin is encoded and next bin is encoded based on the updated probability model. Conventional CABAC encoders can encode only one bin per cycle, which cannot increase the encoding throughput. The probability model does not need to be updated in the bypass bins. In this paper, a HEVC CABAC encoder is proposed to increase encoding throughput by parallel processing of bypass bins. The designed CABAC encoder can process either a regular bin or maximum 4 bypass bins in a cycle. On the average, it can process 1.15~1.92 bins in a cycle. Synthesized in 0.18 um technology, its gate count, maximum operating speed, and the maximum throughput are 78,698 gates, 136 MHz, and 261 Mbin/s, respectively.
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