For new Duality Structure and its Application in the NCV-|v1 > Library

Title & Authors
For new Duality Structure and its Application in the NCV-|v1 > Library
Park, Dong-Young; Jeong, Yeon-Man;

Abstract
The characteristic and application of a new duality structure in the $\small{NCV-{\mid}v_1}$ > library is studied in this paper. All unitary operations on arbitrarily many qudits n can be expressed as composition of one- and two-qudit $\small{NCV-{\mid}v_1}$ > libraries if their state vectors are eigenvectors. This research provides an extended realization from Barencos many bits n operator(U(2n)) which is applicable to only all positive polarity statevectors to whole polarity ones. At the control gate synthesis of a unitary operator, such an enhanced expansion is possible due to their symmetric duality property in the case of using both $\small{NCV-{\mid}v_1}$ > and $\small{NCV^{\dag}-{\mid}v_1}$ > libraries which make the AND predominantly dependent cascade synthesis possible.
Keywords
Qudit;Eigenvector;Unitary $\small{2{\times}2}$ Gate;$\small{NCV-{\mid}v_1}$ > Library;$\small{NCV^{\dag}-{\mid}v_1}$ > Library;
Language
Korean
Cited by
References
1.
D. Maslov and G. Dueck, "Reversible Cascades with Minimal Garbage," IEEE Trans. CAD, vol. 23, no. 11, 2004, pp. 1497-1509.

2.
R. Wille and R. Dreschler, "BDD-based Synthesis of Reversible Logic Circuits for Larger Functions," Proc. DAC, San Francisco, USA, July, 2009, pp. 270-275.

3.
D. Miller, R. Wille, and G. Dueck, "Synthesizing Reversible Circuits for Irreversible Functions," 12th Euromicro Conf. on Digital System Design/ Architectures, Methods and Tools, Patras, Greece, August 2009, pp. 749-756.

4.
Z. Zilic, K. Radecka, and A. Khazamiphur, "Reversible circuit, technology mapping from non-reversible specifications," Proc. Design Automation and Test in Europe, Nice, France April 2007, pp. 558-563.

5.
S. Sultana and K. Radecka, "Rev-Map: A Direct Gateway from Classical Irreversible Network to Reversible Network," IEEE 42th Int. Symp. on Multiple-Valued Logic, Victoria, Canada, May 2011, pp. 147-152.

6.
D. Park and Y. Jeong, "A New Functional Synthesis Method for Macro Quantum Circuits Realized in Affine-Controlled NCV-Gates," J. of the Korea Institute of Electronic Communication Sciences, vol. 9, no. 4, 2014, pp. 447-454.

7.
D. Park and Y. Jeong, "Gate Cost Reduction Policy for Direct Irreversible-to-Reversible Mapping Method without Reversible Embedding," J. of the Korea Institute of Electronic Communication Sciences, vol. 9, no. 11, 2014, pp. 1233-1240.

8.
A. Barenco, C. Bennett, R. Cleve, D. DiVinchenzo, N. Margolus, P. Shor, T. Sleator, J. Smolin, and T. Weinfurter, "Elementary reversible circuits using a new class of quantum gates," The American Physical Society, vol. 52, 1995, pp. 3457-3467.

9.
D. Miller and Z. Sasanian, "Recent Developments on Mapping Reversible Circuits to Quantum Gate Libraries," Int. Symp. on Electronic System Design(ISED), Kolkata, India, December 2012, pp. 17-22.

10.
Z. Sasanian, R. Wille, and D. Miller, "Realizing reversible circuits using a new class of quantum gates," in Design Automation Conf., ,San Francisco, USA, June 2012, pp. 36-41.

11.
A. Abhari, R. Wille, and R. Drechsler, "An examination of the $NCV-{\mid}v_1>$ quantum library based on minimal circuits," In Proc. the IEEE 45th Int. Symp. on Multiple-Valued Logic, Waterloo, Canada, May 2015, pp. 42-47.

12.
D. Park and Y. Jeong, "Realizing Mixed-Polarity MCT gates using $NCV-{\mid}v1>$ Library," J. of the Korea Institute of Electronic Communication Sciences, vol. 11, no. 1, 2016, pp. 29-36.