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Study of On-chip Liquid Cooling in Relation to Micro-channel Design
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 Title & Authors
Study of On-chip Liquid Cooling in Relation to Micro-channel Design
Won, Yonghyun; Kim, Sungdong; Kim, Sarah Eunkyung;
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The demand for multi-functionality, high density, high performance, and miniaturization of IC devices has caused the technology paradigm shift for electronic packaging. So, thermal management of new packaged chips becomes a bottleneck for the performance of next generation devices. Among various thermal solutions such as heat sink, heat spreader, TIM, thermoelectric cooler, etc. on-chip liquid cooling module was investigated in this study. Micro-channel was fabricated on Si wafer using a deep reactive ion etching, and 3 different micro-channel designs (straight MC, serpentine MC, zigzag MC) were formed to evalute the effectiveness of liquid cooling. At the heating temperature of and coolant flow rate of 150ml/min, straight MC showed the high temperature differential of after liquid cooling. The shape of liquid flowing through micro-channel was observed by fluorescence microscope, and the temperarue differential of liquid cooling module was measuremd by IR microscope.
Liquid cooling;Thermal management;Micro-channel;direct cooing;
 Cited by
A. J. McNamara, Y. Joshi, and Z. M. Zhang, "Characterization of nanostructured thermal interface materials: A review", Int. J. Therm. Sci., 62, 2 (2011).

Jun Xu and Timoth S. Fisher, "Enhancement of thermal interface materials with carbon nanotube arrays", Int. J. Heat and Mass Trans., 49(9-10), 1658 (2006). crossref(new window)

Sara N. Paisner, "Nanotechnology and methematical methods for high-performance thermal interface material", Global SMT & Package. 36 (2008).

J. Ayala, A. Sridhar, V. pangracious, D. Atienza, and Y. Leblebici, "Through silicon vias-based grid for thermal control in 3D chips", Social Infromatics and Telecommunications Engineering, 90 (2008).

B. Goplen and S. Sapatnekar, "Thermal Via Placement in 3D ICs", International symposium on physical design, 167 (2005).

G. Upadhya, M. Munch, P. Zhou, J. Hom, D. Werner, and M. McMaster, "Micro-scale liquid cooling system for high heat flux processor cooling applications", IEEE STMM., 116 (2006).

J. Li and G. P. Peterson, "Geometric optimization of a micro heat sink with liquid flow", IEEE Trans. Comp. Packag. Tech., 29(1), 145 (2006). crossref(new window)

X. Wei and Y. Joshi, "Optimization Study of Stacked Micro- Channel Heat Sinks for Micro-Electronic Cooling", IEEE Trans. on Comp. Packag. Tech., 26(1), 55 (2003). crossref(new window)

N. Khan, L. H. Yu, T. S. Pin, S. W. Ho, V. Kripesh, D. Pinjala J. H. Lau, and T. K. Chuan, "3-D Packaging With Through-Silicon Via (TSV) for Electrical and Fluidic Interconnections", IEEE Trans. Comp., Packag., and Manuf. Tech., 3(2), 221 (2013). crossref(new window)

B. Dang, M. S. Bakir, and J. D. Meindl, "Integrated thermalfluidic I/O interconnects for an on-chip microchannel heat sink", IEEE EDL, 27, 117 (2006). crossref(new window)

M. Park, S. Kim, and S. E. Kim, "Study of Chip-level Liquid Cooling for High-heat-flux Devices", J. Microelectron. Packag. Soc., 22(2), 27 (2015).

M. Park, S. Kim, and S. E. Kim, "TSV Liquid Cooling System for 3D Integrated Circuits", J. Microelectron. Packag. Soc., 20(3), 1 (2013).

T. Harirchian and S. V. Garimella, "Microchannel size effects on local flow boiling heat transfer to a dielectric fluid", Int. J. Heat and Mass Transfer, 51, 3724 (2008). crossref(new window)