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PCM Main Memory for Low Power Embedded System
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 Title & Authors
PCM Main Memory for Low Power Embedded System
Lee, Jung-Hoon;
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 Abstract
Nonvolatile memories in memory hierarchy have been investigated to reduce its energy consumption because nonvolatile memories consume zero leakage power in memory cells. One of the difficulties is, however, that the endurance of most nonvolatile memory technologies is much shorter than the conventional SRAM and DRAM technology. This has limited its usage to only the low levels of a memory hierarchy, e.g., disks, that is far from the CPU. In this paper, we study the use of a new type of nonvolatile memories - the Phase Change Memory (PCM) with a DRAM buffer system as the main memory. Our design reduced the total energy of a DRAM main memory of the same capacity by 80%. These results indicate that it is feasible to use PCM technology in place of DRAM in the main memory for better energy efficiency.
 Keywords
DRAM;PCM(Phase Change Memory);Main memory;Buffer system;
 Language
Korean
 Cited by
1.
New buffer mapping method for Hybrid SPM with Buffer sharing, IEMEK Journal of Embedded Systems and Applications, 2016, 11, 4, 209  crossref(new windwow)
2.
Cache Simulator Design for Optimizing Write Operations of Nonvolatile Memory Based Caches, IEMEK Journal of Embedded Systems and Applications, 2016, 11, 2, 87  crossref(new windwow)
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