Hemispherical Grained Silicon formation Condition on In-Situ Phosphorous Doped Amorphous-Si Using The Seeding Method

Seeding Method를 이용한 인이 도우핑된 Amorphous-Si에서의 HSG형성 조건

  • 정양희 (여수대학교 전기 및 반도체공학과) ;
  • 강성준 (여수대학교 반도체ㆍ응용물리학과)
  • Published : 2001.10.01


In this paper, a new HSG-Si formation technology, "seeding method', which employs Si$_2$H$_{6}$-molecule irradiation and annealing, was applied for realizing 64Mbit DRAMs. By using this technique, grain size controlled HSG-Si can be fabricated on in-situ phosphorous-doped amorphous-Si electrode. The new HSG-Si fabrication technology achieves twice the storage capacitance with high reliability for the stacked capacitors. In this technique, optimum process conditions of the phosphorous concentration, storage polysilicon deposition temperature and thickness of hemispherical grain silicon are in the range of 3.0-4.0E19atoms/㎤, 53$0^{\circ}C$ and 400$\AA$, respectively. In the 64M bit DRAM capacitor using optimum process conditions, limit thickness of dielectric nitride is about 65$\AA$.