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Reduction of Plasma Process Induced Damage during HDP IMD Deposition

  • Kim, Sang-Yung (ANAM Semiconductor Inc.) ;
  • Lee, Woo-Sun (Department of Electrical Engineering Chosun University) ;
  • Seo, Yong-Jin (School of Electrical & Electronics Engineering, Daebul University)
  • Published : 2002.09.01

Abstract

The HDP (High Density Plasma) CVD process consists of a simultaneous sputter etch and chemical vapor deposition. As CMOS process continues to scale down to sub- quarter micron technology, HDP process has been widely used fur the gap-fill of small geometry metal spacing in inter-metal dielectric process. However, HBP CVD system has some potential problems including plasma-induced damage. Plasma-induced gate oxide damage has been an increasingly important issue for integrated circuit process technology. In this paper, thin gate oxide charge damage caused by HDP deposition of inter-metal dielectric was studied. Multiple step HDP deposition process was demonstrated in this work to prevent plasma-induced damage by introducing an in-situ top SiH$_4$ unbiased liner deposition before conventional deposition.

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