A Study on an Area-efficient Scheduler for Input-Queued ATM Switches

입력 큐 방식의 ATM 스위치용 면적 효율적인 스케줄러 연구

  • Published : 2005.06.01

Abstract

Currently the research on input-queued ATM switches is one of the most active research fields. Many achievements have been made in the research on scheduling algorithms for input-queued ATM switches and also applied in commerce. The scheduling algorithms have the characteristics of improving throughput, satisfying QoS requirements and providing service fairly. In this paper, we studied on an implementation of scheduler which arbitrates the input-queued ATM switches efficiently and swiftly. The proposed scheduler approximately provides $100\%$ throughput for scheduling. The proposed algorithm completes the arbitration for N-port VOQ switch with 4-iterative matching. Also the proposed algorithm has a merit for implementing the scheduling algorithm with 1/2 area compared to that of iSLIP scheduling algorithm which is widely used. The performance of the proposed scheduling algorithm is superior to that of iSLIP in 4-iterative matching.

Keywords

ATM Switch;Scheduler;VOQ;iSLIP;Throughput