Area-efficient Design of Intra Frame Decoder for H.264/AVC

H.264/AVC용 면적 효율적인 인트라 프레임 디코더 설계

  • 정덕영 (한신대학교 정보통신학과) ;
  • 손승일 (한신대학교 정보통신학과)
  • Published : 2006.11.30

Abstract

H.264/AVC is newest video coding standard of the ITU-T Video coding Experts Group and the ISO/IEC Moving Picture Expets Group. Recently H.264/AVC has been adopted as a video compression standard in DMB and multimedia equipments. In this paper, we propose a H.264/AVC intra frame decoder which can minimize the memory usage and chip size. The proposed intra frame decoder is described in VHDL language and simulated in model_sim. It was verified in chip level by downloading to XCV1000E FPGA chip.

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