Implementation of Encryption Module for Securing Contents in System-On-Chip

콘텐츠 보호를 위한 시스템온칩 상에서 암호 모듈의 구현

  • 박진 (전남대학교 컴퓨터정보통신공학과) ;
  • 김영근 (전남대학교 컴퓨터정보통신공학과) ;
  • 김영철 (전남대학교 컴퓨터정보통신공학과) ;
  • 박주현 (전남대학교 컴퓨터정보통신공학과)
  • Published : 2006.11.01


In this paper, we design a combined security processor, ECC, MD-5, and AES, as a SIP for cryptography of securing contents. Each SIP is modeled and designed in VHDL and implemented as a reusable macro through logic synthesis, simulation and FPGA verification. To communicate with an ARM9 core, we design a BFM(Bus Functional Model) according to AMBA AHB specification. The combined security SIP for a platform-based SoC is implemented by integrating ECC, AES and MD-5 using the design kit including the ARM9 RISC core, one million-gate FPGA. Finally, it is fabricated into a MPW chip using Magna chip $0.25{\mu}m(4.7mm{\times}4.7mm$) CMOS technology.


SIP;ARM9;ECC;AES;MD-5;MPW;CMOS;Encryption Module