IPSiNS: I/O Performance Simulation Tool for NAND Flash Memory-based Storage System

IPSiNS: 낸드 플래시 메모리 기반 저장 장치를 위한 입출력 성능 시뮬레이션 도구

  • 윤경훈 (한양대학교 전자컴퓨터통신공학과) ;
  • 정호영 (한양대학교 전자컴퓨터통신공학과) ;
  • 박성민 (한양대학교 전자컴퓨터통신공학과) ;
  • 심효기 (한양대학교 전자컴퓨터통신공학과) ;
  • 차재혁 (한양대학교 정보통신학부) ;
  • 강수용 (한양대학교 컴퓨터교육과)
  • Published : 2007.10.31


Flash Translation Layer(FTL) which enables NAND Flash memory-based storage system to be used as a block device is designed considering only characteristics of NAND Flash memory. However, since FTL precesses I/O requests which survived against buffer replacement algorithm, FTL algorithm has tight relationship with buffer replacement algorithm. Therefore, if we do not consider both FTL and buffer replacement algorithms, it is difficult to predict the actual I/O performance of the computer systems that have Flash memory-based storage system. The necessity of FTL and buffer replacement algorithm co-design arises here. In this work, we implemented I/O performance evaluation tool, IPSiNS, which simulates both the buffer replacement and FTL algorithms, simultaneously.


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