Abstract

In this paper, we suggest the criticality of Hidden Failure with regard to the design of watch dog timer, used to detect HALT on railway signaling embedded controller, via FMEA and FTA. Hidden Failure means reliability and safety degradation of the system due to any failure occurred on elements added for fault tolerance. In this paper, therefore, we design vital watch dog timer to prevent the system from operating in low SIL conditions and assess the safety of circuit on failure occurrence to demonstrate that safety degradation problems owing to existing design are supplemented.

Keywords

• Embedded Controller;
• Watch-Dog Timer;
• Vital;
• Safety;
• SIL (Safety Integrity Level)

• 내장형제어기;
• 워치독타이머;
• 바이탈;
• 안전성;
• 안전무결성레벨;

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References

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