Pentacene Thin Film Transistors with Various Polymer Gate Insulators

  • Kim, Jae-Kyoung (Dept. of Nano Science and Engineering, Myongji University) ;
  • Kim, Jung-Min (Dept. of Nano Science and Engineering, Myongji University) ;
  • Yoon, Tae-Sik (Dept. of Nano Science and Engineering, Myongji University) ;
  • Lee, Hyun-Ho (Dept. of Chemical engineering, Myongji University) ;
  • Jeon, D. (Dept. of Pysics education & Nano Systems Institute, Seoul Nat'l University) ;
  • Kim, Yong-Sang (Dept. of Electrical Engineering, Myongji University)
  • Published : 2009.03.01


Organic thin film transistors with a pentacene active layer and various polymer gate insulators were fabricated and their performances were investigated. Characteristics of pentacene thin film transistors on different polymer substrates were investigated using an atomic force microscope (AFM) and x-ray diffraction (XRD). The pentacene thin films were deposited by thermal evaporation on the gate insulators of various polymers. Hexamethyldisilazane (HMDS), polyvinyl acetate (PVA) and polymethyl methacrylate (PMMA) were fabricated as the gate insulator where a pentacene layer was deposited at 40, 55, 70, 85, 100 oC. Pentacene thin films on PMMA showed the largest grain size and least trap concentration. In addition, pentacene TFTs of top-contact geometry are compared with PMMA and $SiO_2$ as gate insulators, respectively. We also fabricated pentacene TFT with Poly (3, 4-ethylenedioxythiophene)-Polysturene Sulfonate (PEDOT:PSS) electrode by inkjet printing method. The physical and electrical characteristics of each gate insulator were tested and analyzed by AFM and I-V measurement. It was found that the performance of TFT was mainly determined by morphology of pentacene rather than the physical or chemical structure of the polymer gate insulator


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