Grid-Enabled Parallel Simulation Based on Parallel Equation Formulation

  • Andjelkovic, Bojan (Faculty of Electronic Engineering, University of Nis) ;
  • Litovski, Vanco B. (Faculty of Electronic Engineering, University of Nis) ;
  • Zerbe, Volker (Ilmenau University of Technology)
  • Received : 2009.03.31
  • Accepted : 2010.06.01
  • Published : 2010.08.30


Parallel simulation is an efficient way to cope with long runtimes and high computational requirements in simulations of modern complex integrated electronic circuits and systems. This paper presents an algorithm for parallel simulation based on parallelization in equation formulation and simultaneous calculation of matrix contributions for nonlinear analog elements. In addition, the paper describes the development of a grid interface for a parallel simulator that enables a designer to perform simulations on distant computer clusters. Performances of the developed parallel simulation algorithm are evaluated by simulation of a microelectromechanical system.


  1. T. Sterling, Beowulf Cluster Computing with Linux, MIT Press, Cambridge, Massachusetts, 2001.
  2. I. Foster and C. Kesselmann, The Grid: Blueprint for a New Computing Infrastructure, San Francisco, CA: Morgan Kaufmann, 1999.
  3. J.A.B. Fortes, R.J. Figueiredo, and M.S. Lundstrom, "Virtual Computing Infrastructures for Nanoelectronics Simulation," Proc. IEEE, vol. 93, no. 10, Oct. 2005, pp. 1839-1847.
  4. Xyce Parallel Electronic Simulator home page, Available:
  5. N. Fröhlich et al., "A New Approach for Parallel Simulation of VLSI-Circuits on a Transistor Level," IEEE Trans. Circuits Syst. I, vol. 45, no. 6, 1998, pp. 601-613.
  6. D.E. Martin et al., "Analysis and Simulation of Mixed-Technology VLSI Systems," J. Parallel Distributed Computing, vol. 62, no. 3, 2002, pp. 468-493.
  7. Magma Touts First Parallel Fast Spice," EE Times, Mar. 2007, Available:
  8. "Enhanced HSPICE Revs up Circuit Simulation," EE Times, Mar. 2008, Available:
  9. "Virtuoso Accelerated Parallel Simulator" Available:
  10. M. Wolf and E. Boman, "Parallel Processing '08: An Increasing Role for Combinatorial Methods in Large-Scale Parallel Simulations," June 2008, Available: php?id=1378.
  11. A. Sangiovanni-Vincentelli, C. Li-Kuan, and L. Chua, "An Efficient Heuristic Cluster Algorithm for Tearing Large-Scale Networks," IEEE Trans. Circuits Syst., vol. 24, no. 12, Dec. 1977, pp. 709-717.
  12. T. Kage, F. Kawafuji, and J. Niitsuma, "A Circuit Partitioning Approach for Parallel Circuit Simulation," IEICE Trans. Fundamentals E77-A(3), 1994, pp. 461-466.
  13. L.W. Nagel, SPICE 2, a Computer Program to Simulate Semiconductor Circuits, Memorandum ERL-M250, University of California, Berkley Press, 1975.
  14. N. Fröhlich, V. Glöckel, and J. Fleischmann, "A New Partitioning Method for Parallel Simulation of VLSI Circuits on Transistor Level," Proc. Design, Automation Test in Europe, 2000, pp. 679-684.
  15. Zoltan: Parallel Partitioning, Load Balancing and Data-Management Services, Available:
  16. P. Frey et al., "SEAMS: Simulation Environment for VHDLAMS," Proc. Winter Simulation Conf., 1998, pp. 539-546.
  17. M. Dimitrijević. et al., "Gridification and Parallelization of Electronic Circuit Simulator," Proc. INDEL, Conf. Ind. Electron., 2006, pp. 95-100.
  18. M. Jakovljević. et al., "Transient Electro-Thermal Simulation of Microsystems with Space-Continuous Thermal Models in Analogue Behavioural Simulator," Microelectronics and Reliability, vol. 40, no. 3, 2000, pp. 507-516.
  19. Z. Mrcarica, "Modelling of Microelectromechanical Devices and Simulation of Systems Using Hardware Description Language," (doctoral dissertation), Technical University Vienna, 1995.
  20. V. Litovski and M. Zwolinski, VLSI Circuit Simulation Optimization, London: Chapman and Hall, 1997.
  21. A.R. Newton and A.L. Sangiovanni-Vincentelli, "Relaxation-Based Electrical Simulation," IEEE Trans. Electron. Devices, vol. 30, no. 9, Sept. 1983, pp. 1184-1207.
  22. D. Glozic. et al., "Alecsis, the Simulator," Laboratory for Electronic Design Automation, Faculty of Electronic Engineering, University of Niss, Serbia, 1996, Available: projects/Alecsis/alecsis.htm
  23. V. Litovski, D. Maksimović., and ZZ. Mrcarica, "Mixed-Signal Modeling with AleC++: Specific Features of the HDL," Simulation Practice and Theory, vol. 8, 2001, pp. 433-449.
  24. ZZ. Mrcarica et al., "Mechatronic Simulation Using Alecsis: Anatomy of the Simulator," Proc. Eurosim, 1995, pp. 651-656.
  25. W. Gropp, E. Lusk, and A. Skjellum, Using MPI: Portable Parallel programming with the Message-Passing Interface, 2nd ed., Cambridge, Massachusetts: MIT Press, 1999.
  26. W. Gropp, E. Lusk, and R. Thakur, Using MPI-2: Advanced Features of the Message-Passing Interface, Cambridge, Massachusetts: MIT Press, 1999.
  27. S. Burke et al., "gLite3 User Guide," Available: file/722398/1.1/gLite-3-UserGuide.pdf, 2007
  28. B. Andelkovic., V. Litovski, and P. Petkovic., "Implementation and Performance Analysis of Parallel Circuit Simulator on Beowulf Cluster," Proc. ETRAN Conf., 2007, (Proc. on CD, EL1.6.)
  29. ZZ Mrcarica et al., "Describing Space-Continuous Models of Microelectromechanical Devices for Behavioural Simulation," Proc. EURO-DAC Euro. Design Automation Conf. with EUROVHDL, 1996, pp. 316-321.
  30. ZZ Mrcarica et al., "Integrated Simulator for MEMS Using FEM Implementation in AHDL and Frontal Solver for Large-Sparse System of Equations," Proc. Design Test Microsyst., 1999, pp. 271-278.
  31. "Intel TV Interview: Parallelizing Legacy EDA Applications," Available: