DOI QR코드

DOI QR Code

Implementation of sin/cos Processor for Descriptor on SIFT

SIFT의 descriptor를 위한 sin/cos 프로세서의 구현

  • Received : 2013.03.13
  • Accepted : 2013.04.02
  • Published : 2013.04.28

Abstract

The SIFT algorithm is being actively researched for various image processing applications including video surveillance and autonomous vehicle navigation. The computation of sin/cos function is the most cost part needed in whole computational complexity and time for SIFT descriptor. In this paper, we implement a hardware to sin/cos function of descriptor on sift feature detection algorithm. The proposed Sin/Cosine processor is coded in Verilog and synthesized and simulated using Xilinx ISE 9.2i. The processor is mapped onto the device Spartan 2E (XC2S200E-PQ208-6). It consumes 149 slices, 233 LUTs and attains a maximum operation frequency of 60.01 MHz. As compared with the software realization, our FPGA circuit can achieve the speed improvement by 40 times in average.

Keywords

SIFT;Descriptor;sin/cos processor;FPGA

References

  1. GholamAli Yaghoubi Sheramin, Shahram Babaie and Reza Kazemi Asl, "Data-Oriented Architecture of Sine and Cosine Functions," International Conference on Advanced Computer Theory and Engineering(ICACTE), pp.32-34, 2010.
  2. Supriya Aggarwal and Kavita Khare, "Hardware Efficient Architecture for Generating Sine/Cosine Waves," International Conference on VLSI Design, pp.57-61, 2012.
  3. K. Maharatna, A. Troya, S. Banerjee, and E. Grass, "Virtually scaling free adaptive CORDIC rotator," IEEE Proc.-Comp. Dig. Tech., Vol.151, No.6, pp.448-456, 2004(11). https://doi.org/10.1049/ip-cdt:20041107
  4. Leena Vachhani, K. Sridharan and Pramod K. Meher, "Efficient CORDIC Algorithms and Architectures for Low Area and High Throughput Implementation," IEEE Transactions on Circuit and Systems-I: Express Briefs, Vol.56, No.1, pp.61-65, 2009(1). https://doi.org/10.1109/TCSII.2008.2010169
  5. C. Stauffer and W. E. L Grimson, "Learning patterns of activity using real-time tracking," IEEE Trans. Pattern Anal. Mach. Intell., Vol.22, No.8, pp.747-757, 2000(8). https://doi.org/10.1109/34.868677
  6. U. Ozguner, C. Stiller, and K. Redmill, "Systems for safety and autonomous behavior in cars: The DARPA grand challenge experience," Proc. IEEE, Vol.95, No.2, pp.397-412, 2007(2). https://doi.org/10.1109/JPROC.2006.888394
  7. C. Y. Lin, P. C. Jo, and C. K. Tseng, "Multi-functional intelligent robot DOC-2," in Proc. IEEE-RAS Int. Conf. Humanoid Robots, pp.530-535, 2006(12).
  8. D. G. Lowe, "Distinctive Image Features from Scale-Invariant Keypoints," International Journal of Computer Vision, Vol.60, No.2, 2004.
  9. H. D. Chati, F. Muhlbauer, T. Braun, C. Bobda, and K. Berns, "Hardware/software co-design of a key point detector on FPGA," in Proc. Annual IEEE Symp. Field-Programmable Custom Computing Machines, pp.355-356, 2007(4).
  10. 박찬일, 이수현, 정용진, "임베디드 환경에서 SIFT 알고리즘의 실시간 처리를 위한 특징점 검출기의 하드웨어 구현," 전자공학회, 제46권, SD 편, 제3호, pp.86-95, 2009.
  11. V. Bonato, E. Marques, and G. A. Constantinides, "A parallel hardware architecture for scale and rotation invariant feature detection," IEEE Trans. Circuits System. Video Tech., Vol.18, No.12, pp.1703-1712, 2008(12). https://doi.org/10.1109/TCSVT.2008.2004936
  12. Y. M. Lin, C. H. Yeh, S. H. Yen, C. H. Ma, P. Y. Chen, and C. C. J. Kuo, "Efficient VLSI design for SIFT feature description," International Symposium on Next-Generation Electronics (ISNE), pp.48-51, 2010.