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재구성 가능한 라스트 레벨 캐쉬 구조를 위한 코어 인지 캐쉬 교체 기법

Core-aware Cache Replacement Policy for Reconfigurable Last Level Cache

  • 손동오 (전남대학교 전자컴퓨터공학부) ;
  • 최홍준 (전남대학교 전자컴퓨터공학부) ;
  • 김종면 (울산대학교 컴퓨터정보통신공학부) ;
  • 김철홍 (전남대학교 전자컴퓨터공학부)
  • Son, Dong-Oh (School of Electronics and Computer Engineering, Chonnam National University) ;
  • Choi, Hong-Jun (School of Electronics and Computer Engineering, Chonnam National University) ;
  • Kim, Jong-Myon (School of Computer Engineering and Information Technology, University of Ulsan) ;
  • Kim, Cheol-Hong (School of Electronics and Computer Engineering, Chonnam National University)
  • 투고 : 2013.06.04
  • 심사 : 2013.09.12
  • 발행 : 2013.11.29

초록

멀티코어 프로세서에서 라스트 레벨 캐쉬는 코어와 메모리의 속도 차이를 줄여주는 역할을 하는 중요한 하드웨어 자원이다. 때문에 라스트 레벨 캐쉬의 효율적인 관리는 프로세서의 성능에 큰 영향을 미친다. 라스트 레벨 캐쉬를 구성하는 공유/비공유 캐쉬는 코어들이 공유하는 데이터와 각 코어의 독립된 데이터를 각각 적재한다. 최근 많은 연구를 통해 라스트 레벨 캐쉬 관리기법이 연구되었지만 주로 공유 캐쉬에 대한 연구만 이뤄지고 있으며 라스트 레벨 캐쉬의 비공유 캐쉬에 대한 연구는 아직 미약하다. 라스트 레벨 캐쉬의 비공유 캐쉬는 각 코어에 동일한 영역이 할당되기 때문에 코어별 작업량이 다를 경우 캐쉬 관리가 효과적이지 않다. 본 논문에서는 라스트 레벨 캐쉬 중 비공유 캐쉬의 효율적인 관리를 위해 코어 인지 캐쉬 교체 기법을 제안한다. 제안된 코어 인지 캐쉬 교체 기법은 비공유 캐쉬를 동적으로 재구성함으로써, 라스트 레벨 캐쉬의 적중률을 향상시킨다. 또한, 우리는 캐쉬 교체 기법의 성능 향상을 위해 2비트 포화 카운터를 적용하였다. 실험 결과 기존의 교체 기법과 비교하여 9.23%의 적중률 향상과 12.85%의 라스트 레벨 캐쉬 접근 시간 감소의 효과가 있었다.

과제정보

연구 과제 주관 기관 : 전남대학교

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