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Analysis, Design and Implementation of an Improved ZVZCS-PWM Forward converter

  • Soltanzadeh, Karim (Dept. of Electrical Engineering, Najafabad Branch, Islamic Azad University) ;
  • Dehghani, Majid (Dept. of Electrical Engineering, Najafabad Branch, Islamic Azad University) ;
  • Khalilian, Hosein (Dept. of Electrical Engineering, Tabriz National University)
  • Received : 2013.02.15
  • Accepted : 2013.08.26
  • Published : 2014.01.01

Abstract

In this paper an Improved Zero Voltage Zero Current Pulse Width Modulation Forward converter which employs a simple resonance snubber circuit is introduced. A simple snubber circuit consists of a capacitor, an inductor and two diodes. In proposed converter, switch Q1 operates at ZCS turn-on, and ZVS turn-off conditions and all-passive semiconductor devices operate at ZVZCS turn-on and turn-off state. The proposed converter is analyzed and various operating modes of the ZVZCS-PWM forward converter are discussed. Analysis and design considerations are presented and the prototype experimental results of a 100w (40 V/2.5A) proposed converter operating at 30 KHz switching frequency confirm the validity of theoretical analysis.

1. Introduction

Pulse width modulated (PWM) forward converter is used in industry in a wide variety of applications. This converter is required to operate with high switching frequencies due to demands for small converter size and high power density. High switching frequency operation, however, results in higher switching losses, increased electromagnetic interference (EMI), and reduced converter efficiency. Numerous soft-switching techniques have been proposed to correct these problems [1-17]. Almost all these techniques achieve soft switching condition in the main switch using an active auxiliary circuit. Some of these active auxiliary circuits are resonant tanks are added to the conventional converters. Quasi-resonant converters are a type family of these converters, that introduced in reduce the switching losses in PWM converters operating at high switching frequency. In these converters, resonances occur in the switch current or in the voltage across the switch [1-7]. In Quasi-resonant converter, switching losses are significantly reduced, but in these types of converters, voltage and current stresses occur.

In [8-10] proposed converter designed to limit the voltage stresses of switches, and the switches can be turned on at the zero-voltage switching (ZVS) during the transition interval.

However, the reverse recovery problem of the rectifier diode will result in the serious spike voltage across the diode.

For improving these problems, various forms of soft-switching techniques for forward converter have been proposed [11-13].

They have been removing the conventional reset winding in switching transformer and achieving soft switching. In [11], converter must operate at frequency modulation and output filter is not optimum.

In [12] an auxiliary transformer is used to achieve soft-switching, and It results in difficultly and complexly designing. In order to improving these problems in converters, zero-voltage transition (ZVT) and zero-current transition (ZCT) converters are developed [13-16]. ZVT and ZCT converters have the advantages of resonant and quasi-resonant converters like low EMI, and the resonances are limited with switching instances, and therefore the converter operates like a regular PWM converter, but in these converters, an auxiliary circuit containing resonant elements and auxiliary switches are used, and need complexity control system.

The aim of this paper is to introduce a simple snubber cell for dc/dc PWM forward converters. The circuits scheme of the new zero voltage and zero current switching pulse width modulation forward converter is shown in Fig. 1. The ZVZCS technique in this paper is provided by a snubber cell. The snubber cell consists of a resonant inductor Lr , a resonant capacitor Cr and two diodes Dr and D . The switch Q1 in the proposed converter turn on at zero current switching (ZCS), and turn off at zero voltage-zero current switching (ZVZCS without any voltage or current spikes on switch and diodes.

Fig. 1.Proposed ZVZCS-PWM forward converter

To simplify the steady-state analysis of the circuit given in Fig. 1 during one switching cycle, it is assumed that input and output voltages and output current are constant, and semiconductor devices and resonant circuit are ideal.

The main theoretical waveforms of the proposed forward converter are shown in Fig. 2, and the equivalent circuit for each operating interval is shown in Fig. 3.

Fig. 2.Theoretical waveforms

Fig. 3.Equivalent circuit schemes of the operation stages in the proposed converter

The theoretically analyzed of proposed ZVZCS converter is in Section 3. The output characteristics of converter and design guideline are presented in Section 4. In Section 5, analysis and design considerations verify by the prototype experimental results of a 100W (40 V/2.5A) proposed converter operating at 30 KHz switching frequency.

 

2. Proposed ZVZCS‐PWM Converter

In the classical configuration of forward converter, a major disadvantage of the reset winding is that the transformer leakage inductance discharge spike cannot be put off. The leakage spike causes a high voltage stress across the power switch, and another disadvantage is the hard turn off of power switch. Both of them decrease the efficiency of power forward converter. In this paper a lossless snubber for the single switch forward converter is proposed, as

1. Absorbs the leakage inductance energy.2. Provides zero current switching for power switch at turning on state.3. Control switch dv / dt at turning off state, thus Provides zero voltage switching for power switch.4. Removes the high voltage stress across the power switch at turning off state.5. Provides the soft switching (ZVS or ZCS) turn on and turn off for all semiconductor devices in forward converter.

 

3. Operation Principles and Analysis

Seven stages occur within one switching cycle in the steady state operation of the proposed converter. The equivalent circuit schemes of these operation stages are given in Fig. 3(a)-(g), respectively.

Stage 1 [ t0, t1 : Fig. 3(a)]: At the beginning of this stage, the switch Q1 is in the off state. The free- wheeling diode D2 is in the on state and conducts the load current Io . At earlier moment of t = t0 , the equations Vcr = −Vs and ILr = ILd = 0 are valid.

At t = t0 , turn on signal is applied to the gate of the main IGBTs Q1 and it turns on under exactly ZCS through leakage inductor Ld . In this stage the resonance between Cr and Lr occurs through diode Dr , and resonance capacitor Cr begins to discharge on the resonance inductor Lr and resonance inductor current iLr (t) increases. During this stage, currents of main switch Q1 rises and D2 current falls simultaneously and linearly. Thus, the Eq. (1) can be written for switch current.

The resonant inductor current and resonant capacitor voltage can be written as follow in this interval.

Where

And

At t = t1 , D1 current reaches to the load current Io , and switch current reaches to primary reflected output current nIo that n = n2 / n1 , and D2 current falls to zero and turns off under exactly ZVZCS, and this stage finishes.

The time interval Δt1 of this stage is written as follow.

Stage 2 [ t1,t2 :Fig. 3(b)]: In this stage, load current flows through D1, and the reflected current nIo plus magnetic current of transformer flows through switch Q1. At t = t1 the resonance between Cr and Lr continues in stage 1. During this stage the resonant voltage vCr (t) decreases firstly, then after cross of zero reaches to Vs and the resonant current iLr (t) decreases from its peak, and reaches to zero at t = t2 , and Dr turns off under ZVZCS, and this state finishes.

The resonance iLr (t) and vCr (t) can be described, respectively as follow.

The time interval of this stage is given by Eq. (9).

Stage 3 [ t2,t3 :Fig. 3(c)]: This stage is on state of the conventional PWM forward converter and, power transfer process occurs from source to load. During this stage, the primary transformer current iLd (t) increases and

iLr (t) and vCr (t) can be written, respectively, as follow.

At t = t3 , switch Q1 turn off under ZVS condition due to capacitor charge, and diode D turns on under ZVZCS and this stage finishes. The time interval Δt3 of this stage is written in Eq. (12).

Where D is the duty cycle of control signal and Ts = 1/ fs is the switching period. fs is the switching frequency.

Stage 4 [ t3,t4 :Fig. 3(d)]: At t = t3 , the switch Q1 turns off under ZVS, and diode D turns on and conducts the reflected load current nIo . At t = t4 resonance capacitor Cr discharge on Ld and resonance capacitor voltage reaches to zero value, and allowing diode D2 start to conduct.

The resonant vCr (t) for this interval is derived as follow.

The time interval of this stage is written as follow.

Stage 5 [ t4 ,t5 :Fig. 3(e)]: At t = t4 , the diode D2 begins to conduct and the resonance between leakage inductance Ld and capacitor Cr begins, and Cr charges by Ld . During this stage the resonant current iLd (t) decreases from its peak value and vCr (t) arrives to −Vs at t = t5 , and then, diode D turns off. The resonant iLd (t) and vCr (t) can be described, respectively as follow.

Where

And

At t = t5 , vCr (t) arrives to −Vs , and diodes Dm turns on under ZVZCS and this stage finishes.

The time interval of this stage is written as follow.

Stage 6 [ t5,t6 :Fig. 3(f)]: At t = t5 , transformer starts with the beginning of reset through diode Dm. At t = t6 , iDm(t) nulls to zero, and transformer resets completely. The vCr (t) = −Vs , and iLd (t) decreases during this interval, and iLd (t) can be described as follow.

The time interval of this stage is written a follow.

Stage 7 [ t6 ,t7 :Fig. 3(f)]: This stage at t = t6 starts when freewheeling diode D2 current reaches to the load current. At t = t7 , one switching cycle is completed and another switching cycle begins.

 

4. Design Procedure

4.1. DC voltage transfer function

The voltage conversion ratio is derived by equating the average output voltage per cycle. In steady state operation, can be described average output voltage as follow.

From Eqs. (6) and (14) the expression for the conversion ratio can be calculated as follow

Where M is dc conversion ratio, Q = Zd / RL is normalized load and D is duty cycle of switches and D = (Δt1 + Δt2 + Δt3) /Ts . Fig. 4 shows the voltage conversion ratio M = Vo /Vs versus the normalized load Q, for different values of duty ratio D, a fixed normalized frequency fs / fd = 0.15 and n = 1, where n = n2 / n1 is turns ratio of transformer, fs is switching frequency and fd is resonance frequency.

Fig.4.M Versus Q with different D, and fixed fs / fd = 0.15

The proposed ZVZCS PWM forward converter is designed for the following specifications.

The input data are defined as follows:

- Output power: Po = 100W ;- Output voltage: Vo = 40V ;- Input voltage: Vs = 100V ;- Load resistance: RL = 16Ω ;- Switching frequency = 30KHz;

4.2. Design transformer and output filter

Although the lossless snubber cell is present in the PWM forward converter, the transformer turns ratio and output filter can be selected using the traditional hard switching forward converter design method [18] as follow:

Where η is the efficiency of converter, and we are assumed η = 0.9 . Dmax is maximum value of the duty cycle and Dmax = 0.5 is selected with reference to [19]. n =1 is selected. Ferrite E 42/33/20 core is selected as transformer , core and n1 = n2 = n3 = 40 turns.

The filter inductor Lf and filter Cf capacitor are designed like a regular PWM forward converter. Voltage output ripple and current output ripple must not exceed 1 and 20 percent respectively.

4.3 Design the snubber parameters

The snubber capacitor is designed to control dv / dt of the drain to source voltage of the power switch. When the main switch turns off, it provides an alternative path for the leakage inductance current to reduce switching turning OFF losses and dv / dt EMI noises.

The snubber inductor Lr and the snubber capacitor Cr can be selected using the Fig. 4. From Fig. 4, the normalized load Q = 1.5 for M = 0.4 and D = 0.4 , is obtained, then Zd = Q.RL = 24Ω . According to the Eq. (4) and Eq. (5) can be calculated Lr and Cr as follow.

In order to minimize the influence of the resonant parameters and to easily achieve ZVS turning-OFF for power switch, we are selected fs / fr = 0.15 . Thus

 

5. Experimental Results

The complete circuit diagram of the proposed converter is shown in Fig. 5.

Fig. 5.Complete circuit of the implemented prototype

The control system implemented by two main IC that, they are TL494 and IR2110. The output pulse of the TL494 PWM controller is applied to IR2110. TL494 used for control output voltage, and produces PWM pulse signal. The IR2110 is high voltage, high speed power MOSFET driver with independent high and low side referenced output channels. The output pulse of LO pin is applied to gate of power switch Q1 . By this control circuit, at converter nominal duty cycle is applied to the switch.

In Figs. 6-8 and 9 show the some obtained experimental results of the prototype proposed converter from Fig. 5.

Fig. 6.voltage and current of switch vQ1(t) =100V / div , iQ1(t) = 3A/ div , VGS(t) =10V / div time :10 μs / div

Fig. 7.iLr (t) = iLd (t) = 5A/ div , vCr (t) = 100V / div , VGS (t) = 20V / div , time :10 μs / div

Fig. 8.Output voltage Vo and output current Io V0 = 20V / div , I0 = 1A/ div

Fig. 9.Efficiency of the proposed converter (continuous line) and hard switching counterpart (broken line) versus output power

Fig.6 is shown voltage and current of the switch Q1. In Fig. 6, it can be noticed that power switch in proposed converter operates at ZCS and ZVS mode respectively at turning on, and turning off, and it can be noticed that Q1 don’t have any voltage and current spikes in switching state.

Fig. 7, is shown the current of resonant inductor iLr (t) , the Leakage inductor current iLd (t) and resonant capacitor voltage vCr (t) . As Fig. 7 can be seen the experimental waveforms are closed to theoretical waveform, and confirming the soft switching without voltage and current stresses.

Fig. 8 is shown output voltage VO and output current IO .

As experimentally results of ZVZCS PWM forward converter, it can be clearly seen that the predicted operation principles and theoretical analysis are verified.

The losses of the converter components used for experimental verification are calculated based on formulas at [18, 20] at full load condition, and are listed in Table 1.

Table 1.Comparison of power losses of the proposed converter and the conventional converters

The experimentally efficiency curve of the converter versus output power shows in Fig.9. Notice that proposed converter has 92% efficiency in full load, and also has high efficiency in light load.

At proposed converter the conduction losses in the IGBT around 10% is higher than conventional hard switching converter, due to its peak current.

 

6. Conclusion

In this paper Improved Zero Voltage Zero Current Pulse Width Modulation (ZVZCS-PWM) Forward converter which employs a simple snubber circuit that overcomes most of the drawbacks of the normal PWM dc-dc forward converter is proposed. The switch Q1 operates at ZCS turn-on and ZVS turn-off, and the all-passive semiconductor devices operate at soft switching turn-on and turn-off. This new converter has no additional current and voltage spikes and conduction loss in the main switch in comparison to the hard-switching converter counterpart and is suitable for high switching frequency and high power operation. A PWM ZVZCS forward converter with has been analyzed in detail. The predicted operation principles and theoretical analysis of this converter has been exactly verified with experimental results of a 100W and 30KHz IGBT-PWM proposed converter. It has been clearly observed that power switch have operated with soft switching.

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