A Small-area Hardware Design of 128-bit Lightweight Encryption Algorithm LEA

128비트 경량 블록암호 LEA의 저면적 하드웨어 설계

Sung, Mi-Ji;Shin, Kyung-Wook

  • Received : 2015.02.23
  • Accepted : 2015.04.06
  • Published : 2015.04.30


This paper describes an efficient hardware design of Lightweight Encryption Algorithm (LEA) developed by National Security Research Institute(NSRI). The LEA crypto-processor supports for master key of 128-bit. To achieve small-area and low-power implementation, an efficient hardware sharing is employed, which shares hardware resources for encryption and decryption in round transformation block and key scheduler. The designed LEA crypto-processor was verified by FPGA implementation. The LEA core synthesized with Xilinx ISE has 1,498 slice elements, and the estimated throughput is 216.24 Mbps with 135.15 MHz.


Lightweight Encryption Algorithm;LEA;IoT Security;Information Security;Secret Key Encryption


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Grant : 사물인터넷 기반 영상보안용 초저전력 SoC 핵심 IP 기술 개발

Supported by : 산업통상자원부